49 lines
1.5 KiB
Diff
49 lines
1.5 KiB
Diff
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From 1d390437f605db28596ad4c4bfeca2fed052c025 Mon Sep 17 00:00:00 2001
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From: Douglas Anderson <dianders@chromium.org>
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Date: Mon, 20 May 2019 10:56:05 -0700
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Subject: [PATCH 50/54] ARM: dts: rockchip: Allow wakeup from rk3288-veyron's
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dwc2 USB ports
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We want to be able to wake from USB if a device is plugged in that
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wants remote wakeup. Enable it on both dwc2 controllers.
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NOTE: this is added specifically to veyron and not to rk3288 in
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general since it's not known whether all rk3288 boards are designed to
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support USB wakeup. It is plausible that some boards could shut down
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important rails in S3.
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Also note that currently wakeup doesn't seem to happen unless you use
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the "deep" suspend mode (where SDRAM is turned off). Presumably the
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shallow suspend mode is gating some sort of clock that's important but
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I couldn't easily figure out how to get it working.
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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arch/arm/boot/dts/rk3288-veyron.dtsi | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
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index 1252522392c7..1d8bfed7830c 100644
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--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
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+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
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@@ -424,6 +424,7 @@
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&usb_host1 {
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status = "okay";
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+ snps,need-phy-for-wake;
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};
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&usb_otg {
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@@ -432,6 +433,7 @@
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assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
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assigned-clock-parents = <&usbphy0>;
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dr_mode = "host";
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+ snps,need-phy-for-wake;
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};
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&vopb {
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--
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2.11.0
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