181 lines
6.5 KiB
Diff
181 lines
6.5 KiB
Diff
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From c40cf7705e13d288d900e044c0a2f756e9e4909a Mon Sep 17 00:00:00 2001
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From: Douglas Anderson <dianders@chromium.org>
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Date: Tue, 16 Apr 2019 14:53:49 -0700
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Subject: [PATCH 32/53] usb: dwc2: optionally assert phy reset when waking up
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On the rk3288 USB host-only port (the one that's not the OTG-enabled
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port) the PHY can get into a bad state when a wakeup is asserted (not
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just a wakeup from full system suspend but also a wakeup from
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autosuspend).
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We can get the PHY out of its bad state by asserting its "port reset",
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but unfortunately that seems to assert a reset onto the USB bus so it
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could confuse things if we don't actually deenumerate / reenumerate the
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device.
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We can also get the PHY out of its bad state by fully resetting it using
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the reset from the CRU (clock reset unit), which does a more full
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reset. The CRU-based reset appears to actually cause devices on the bus
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to be removed and reinserted, which fixes the problem (albeit in a hacky
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way).
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It's unfortunate that we need to do a full re-enumeration of devices at
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wakeup time, but this is better than alternative of letting the bus get
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wedged.
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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drivers/usb/dwc2/core.h | 8 ++++++++
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drivers/usb/dwc2/core_intr.c | 12 ++++++++++++
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drivers/usb/dwc2/hcd.c | 18 +++++++++++++++---
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drivers/usb/dwc2/platform.c | 9 +++++++++
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4 files changed, 44 insertions(+), 3 deletions(-)
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diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
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index 30bab8463c96..764c78ebee28 100644
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--- a/drivers/usb/dwc2/core.h
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+++ b/drivers/usb/dwc2/core.h
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@@ -859,6 +859,8 @@ struct dwc2_hregs_backup {
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* @gadget_enabled: Peripheral mode sub-driver initialization indicator.
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* @ll_hw_enabled: Status of low-level hardware resources.
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* @hibernated: True if core is hibernated
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+ * @reset_phy_on_wake: Quirk saying that we should assert PHY reset on a
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+ * remote wakeup.
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* @frame_number: Frame number read from the core. For both device
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* and host modes. The value ranges are from 0
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* to HFNUM_MAX_FRNUM.
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@@ -972,6 +974,7 @@ struct dwc2_hregs_backup {
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* @status_buf_dma: DMA address for status_buf
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* @start_work: Delayed work for handling host A-cable connection
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* @reset_work: Delayed work for handling a port reset
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+ * @phy_reset_work: Work structure for doing a PHY reset
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* @otg_port: OTG port number
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* @frame_list: Frame list
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* @frame_list_dma: Frame list DMA address
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@@ -1045,6 +1048,7 @@ struct dwc2_hsotg {
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unsigned int gadget_enabled:1;
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unsigned int ll_hw_enabled:1;
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unsigned int hibernated:1;
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+ unsigned int reset_phy_on_wake:1;
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u16 frame_number;
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struct phy *phy;
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@@ -1147,6 +1151,7 @@ struct dwc2_hsotg {
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struct delayed_work start_work;
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struct delayed_work reset_work;
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+ struct work_struct phy_reset_work;
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u8 otg_port;
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u32 *frame_list;
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dma_addr_t frame_list_dma;
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@@ -1431,6 +1436,8 @@ int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg);
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int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg);
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int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg,
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int rem_wakeup, int reset);
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+static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg)
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+{ schedule_work(&hsotg->phy_reset_work); }
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#else
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static inline int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg)
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{ return 0; }
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@@ -1454,6 +1461,7 @@ static inline int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg)
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static inline int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg,
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int rem_wakeup, int reset)
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{ return 0; }
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+static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg) {}
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#endif
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diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
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index 19ae2595f1c3..6af6add3d4c0 100644
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--- a/drivers/usb/dwc2/core_intr.c
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+++ b/drivers/usb/dwc2/core_intr.c
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@@ -435,6 +435,18 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
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/* Restart the Phy Clock */
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pcgcctl &= ~PCGCTL_STOPPCLK;
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dwc2_writel(hsotg, pcgcctl, PCGCTL);
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+
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+ /*
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+ * If we've got this quirk then the PHY is stuck upon
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+ * wakeup. Assert reset. This will propagate out and
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+ * eventually we'll re-enumerate the device. Not great
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+ * but the best we can do. We can't call phy_reset()
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+ * at interrupt time but there's no hurry, so we'll
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+ * schedule it for later.
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+ */
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+ if (hsotg->reset_phy_on_wake)
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+ dwc2_host_schedule_phy_reset(hsotg);
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+
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mod_timer(&hsotg->wkp_timer,
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jiffies + msecs_to_jiffies(71));
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} else {
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diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
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index 8667ddf3ca74..978232a9e4a8 100644
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--- a/drivers/usb/dwc2/hcd.c
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+++ b/drivers/usb/dwc2/hcd.c
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@@ -4376,6 +4376,17 @@ static void dwc2_hcd_reset_func(struct work_struct *work)
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spin_unlock_irqrestore(&hsotg->lock, flags);
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}
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+static void dwc2_hcd_phy_reset_func(struct work_struct *work)
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+{
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+ struct dwc2_hsotg *hsotg = container_of(work, struct dwc2_hsotg,
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+ phy_reset_work);
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+ int ret;
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+
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+ ret = phy_reset(hsotg->phy);
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+ if (ret)
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+ dev_warn(hsotg->dev, "PHY reset failed\n");
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+}
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+
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/*
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* =========================================================================
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* Linux HC Driver Functions
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@@ -5152,6 +5163,8 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
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destroy_workqueue(hsotg->wq_otg);
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}
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+ cancel_work_sync(&hsotg->phy_reset_work);
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+
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del_timer(&hsotg->wkp_timer);
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}
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@@ -5293,11 +5306,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
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hsotg->hc_ptr_array[i] = channel;
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}
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- /* Initialize hsotg start work */
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+ /* Initialize work */
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INIT_DELAYED_WORK(&hsotg->start_work, dwc2_hcd_start_func);
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-
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- /* Initialize port reset work */
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INIT_DELAYED_WORK(&hsotg->reset_work, dwc2_hcd_reset_func);
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+ INIT_WORK(&hsotg->phy_reset_work, dwc2_hcd_phy_reset_func);
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/*
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* Allocate space for storing data on status transactions. Normally no
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diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
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index 9aa9682a5cd2..c01fa8ffc0c8 100644
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--- a/drivers/usb/dwc2/platform.c
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+++ b/drivers/usb/dwc2/platform.c
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@@ -481,6 +481,15 @@ static int dwc2_driver_probe(struct platform_device *dev)
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hsotg->gadget_enabled = 1;
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}
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+ hsotg->reset_phy_on_wake =
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+ of_property_read_bool(dev->dev.of_node,
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+ "snps,reset-phy-on-wake");
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+ if (hsotg->reset_phy_on_wake && !hsotg->phy) {
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+ dev_warn(hsotg->dev,
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+ "Quirk reset-phy-on-wake only supports generic PHYs\n");
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+ hsotg->reset_phy_on_wake = false;
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+ }
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+
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if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
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retval = dwc2_hcd_init(hsotg);
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if (retval) {
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--
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2.11.0
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