42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
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From 75481833c6dbab4c29d15452f6b4337c16f5407b Mon Sep 17 00:00:00 2001
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From: Matthias Kaehlcke <mka@chromium.org>
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Date: Mon, 20 May 2019 15:00:49 -0700
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Subject: [PATCH 40/54] ARM: dts: rockchip: remove GPU 500 MHz OPP on rk3288
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The NPLL is the only safe way to generate 500 MHz for the GPU. The
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downstream Chrome OS 3.14 kernel ('official' kernel for veyron
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devices) re-purposes NPLL to HDMI and hence disables the OPP for
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the GPU (see https://crrev.com/c/1574579). Disable it here as well
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to keep in sync and avoid problems in case someone decides to
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re-purpose NPLL.
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Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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[moved from veyron to general rk3288, as tying up the NPLL for a
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not-that-helpful opp (not really fast but will still generate
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quite a bit of heat) doesn't make so much sense when it will
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keep us from supporting other display modes in the future]
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm/boot/dts/rk3288.dtsi | 4 ----
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1 file changed, 4 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index fd188bb4fd48..159d91180cee 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -1307,10 +1307,6 @@
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1100000>;
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};
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- opp-500000000 {
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- opp-hz = /bits/ 64 <500000000>;
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- opp-microvolt = <1200000>;
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- };
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <1250000>;
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--
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2.11.0
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