51 lines
1.6 KiB
Diff
51 lines
1.6 KiB
Diff
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From 280fa349757bb240c650882feee5a861150ccc2d Mon Sep 17 00:00:00 2001
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From: Matthias Kaehlcke <mka@chromium.org>
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Date: Tue, 9 Apr 2019 16:14:05 -0700
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Subject: [PATCH 20/54] ARM: dts: rockchip: Add BT_EN to the power sequence for
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veyron
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Add GPIO D5 (BT_ENABLE_L) as reset-GPIO to the power sequence for the
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Bluetooth/WiFi module. On devices with a Broadcom module the signal
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needs to be asserted to use Bluetooth.
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Note that BT_ENABLE_L is a misnomer in the schematics, the signal
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actually is active-high.
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Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm/boot/dts/rk3288-veyron.dtsi | 13 ++++++++++---
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1 file changed, 10 insertions(+), 3 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
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index fa38eb967f12..efa7b425c9ed 100644
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--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
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+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
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@@ -62,12 +62,19 @@
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pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
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/*
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- * On the module itself this is one of these (depending
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- * on the actual card populated):
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+ * Depending on the actual card populated GPIO4 D4 and D5
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+ * correspond to one of these signals on the module:
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+ *
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+ * D4:
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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+ *
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+ * D5:
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+ * - BT_I2S_WS_BT_RFDISABLE_L
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+ * - No connect
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*/
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- reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
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+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>,
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+ <&gpio4 RK_PD5 GPIO_ACTIVE_LOW>;
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};
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vcc_5v: vcc-5v {
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--
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2.11.0
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