51 lines
1.4 KiB
Diff
51 lines
1.4 KiB
Diff
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From d17aa2d262e8574a8c6befb5b6470d1c32875cf8 Mon Sep 17 00:00:00 2001
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From: Douglas Anderson <dianders@chromium.org>
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Date: Tue, 16 Apr 2019 14:53:50 -0700
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Subject: [PATCH 26/54] ARM: dts: rockchip: Hook resets up to USB PHYs on
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rk3288.
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Let's hook up the resets to the three USB PHYs on rk3288 as per the
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bindings. This is in preparation for a future patch that will set the
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"snps,reset-phy-on-wake" on the host port.
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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arch/arm/boot/dts/rk3288.dtsi | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index a024d1e7e74c..3f361fad4684 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -904,6 +904,8 @@
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clocks = <&cru SCLK_OTGPHY0>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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+ resets = <&cru SRST_USBOTG_PHY>;
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+ reset-names = "phy-reset";
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};
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usbphy1: usb-phy@334 {
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@@ -912,6 +914,8 @@
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clocks = <&cru SCLK_OTGPHY1>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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+ resets = <&cru SRST_USBHOST0_PHY>;
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+ reset-names = "phy-reset";
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};
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usbphy2: usb-phy@348 {
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@@ -920,6 +924,8 @@
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clocks = <&cru SCLK_OTGPHY2>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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+ resets = <&cru SRST_USBHOST1_PHY>;
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+ reset-names = "phy-reset";
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};
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};
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};
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--
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2.11.0
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