90 lines
3.2 KiB
Diff
90 lines
3.2 KiB
Diff
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From b79b87ffc54b143172880c6ce5dd66d30c772d76 Mon Sep 17 00:00:00 2001
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From: Myy Miouyouyou <myy@miouyouyou.fr>
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Date: Wed, 2 May 2018 21:54:37 +0200
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Subject: [PATCH] ARM: DTSI: rk3288: Add the appropriate clock references
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So, the commit f2e3a5f557ad27f6a6f447717090a39cea238d6a (Torvalds
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branch) is forcing the DTS files to provide appropriate clock
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references named "aclk" and "iface" for each MMU node.
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The references are then manipulated by the Rockchip IOMMU driver.
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If the references are not present, the IOMMU driver bails out with
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an error.
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However, no changes has been pushed to add these clock references
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to the RK3288 DTSI file, making the Rockchip IOMMU driver fail all
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the Video hardware related MMU probes.
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That result in no display, which a major inconvenience.
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The following patch, taken from the linux-rockchip Git repository
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maintained by @mmind, written by Jeffy Chen, actually adds these
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clock references to the rk3288.dtsi.
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Orignal patch link :
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https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/commit/arch/arm/boot/dts/rk3288.dtsi?h=for-next&id=c78751f91c0b5461ba08b123f85c1ed146a32f97
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Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
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---
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arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index a258a3f7..e9ac64e2 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -972,6 +972,8 @@
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reg = <0x0 0xff900800 0x0 0x40>;
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interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "iep_mmu";
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+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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+ clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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status = "disabled";
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};
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@@ -981,6 +983,8 @@
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reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "isp_mmu";
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+ clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
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+ clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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rockchip,disable-mmu-reset;
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status = "disabled";
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@@ -1040,6 +1044,8 @@
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reg = <0x0 0xff930300 0x0 0x100>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopb_mmu";
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+ clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
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+ clock-names = "aclk", "iface";
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power-domains = <&power RK3288_PD_VIO>;
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#iommu-cells = <0>;
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status = "disabled";
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@@ -1088,6 +1094,8 @@
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reg = <0x0 0xff940300 0x0 0x100>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopl_mmu";
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+ clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
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+ clock-names = "aclk", "iface";
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power-domains = <&power RK3288_PD_VIO>;
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#iommu-cells = <0>;
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status = "disabled";
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@@ -1220,6 +1228,8 @@
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reg = <0x0 0xff9a0800 0x0 0x100>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vpu_mmu";
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+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
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+ clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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status = "disabled";
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};
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@@ -1250,6 +1260,8 @@
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reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hevc_mmu";
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+ clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
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+ clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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status = "disabled";
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};
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--
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2.17.0
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