diff --git a/README.md b/README.md
index ab0822f..1a2a562 100644
--- a/README.md
+++ b/README.md
@@ -41,7 +41,8 @@ If you don't want to or can't build the image, you can find downloads under <rel
 
 ## Dependencies
 
-Building PrawnOS has been tested on Debian 9 Stretch (in a VM)
+Building PrawnOS has been tested on Debian 10 Buster (in a VM)
+_stretch doesn't work as the version of gcc-arm-none-eabi is too old_
 This is the only build enviroment that is supported. 
 These packages are required:
 
diff --git a/makefile b/makefile
index 2dc3bb7..f06d00b 100644
--- a/makefile
+++ b/makefile
@@ -13,7 +13,7 @@
 # You should have received a copy of the GNU General Public License
 # along with PrawnOS.  If not, see <https://www.gnu.org/licenses/>.
 
-KVER=4.19.67
+KVER=5.2.9
 ifeq ($(PRAWNOS_SUITE),)
 PRAWNOS_SUITE=buster
 endif
diff --git a/resources/BuildResources/config b/resources/BuildResources/config
index 0c1db66..6808361 100644
--- a/resources/BuildResources/config
+++ b/resources/BuildResources/config
@@ -1,15 +1,17 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.19.67-gnu Kernel Configuration
+# Linux/arm 5.2.9-gnu Kernel Configuration
 #
 
 #
-# Compiler: arm-none-eabi-gcc (15:5.4.1+svn241155-1) 5.4.1 20160919
+# Compiler: arm-none-eabi-gcc (15:7-2018-q2-6) 7.3.1 20180622 (release) [ARM/embedded-7-branch revision 261907]
 #
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=50401
+CONFIG_GCC_VERSION=70301
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_HAS_ASM_GOTO=y
+CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
+CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED=y
 CONFIG_IRQ_WORK=y
 CONFIG_BUILDTIME_EXTABLE_SORT=y
 
@@ -19,28 +21,28 @@ CONFIG_BUILDTIME_EXTABLE_SORT=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 # CONFIG_COMPILE_TEST is not set
 CONFIG_LOCALVERSION=""
-# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_BUILD_SALT=""
 CONFIG_HAVE_KERNEL_GZIP=y
 CONFIG_HAVE_KERNEL_LZMA=y
 CONFIG_HAVE_KERNEL_XZ=y
 CONFIG_HAVE_KERNEL_LZO=y
 CONFIG_HAVE_KERNEL_LZ4=y
-# CONFIG_KERNEL_GZIP is not set
+CONFIG_KERNEL_GZIP=y
 # CONFIG_KERNEL_LZMA is not set
-CONFIG_KERNEL_XZ=y
+# CONFIG_KERNEL_XZ is not set
 # CONFIG_KERNEL_LZO is not set
 # CONFIG_KERNEL_LZ4 is not set
-CONFIG_DEFAULT_HOSTNAME="prawnos"
+CONFIG_DEFAULT_HOSTNAME="localhost"
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 CONFIG_CROSS_MEMORY_ATTACH=y
 # CONFIG_USELIB is not set
-# CONFIG_AUDIT is not set
+CONFIG_AUDIT=y
 CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_AUDITSYSCALL=y
 
 #
 # IRQ subsystem
@@ -58,6 +60,8 @@ CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_IRQ_FORCED_THREADING=y
 CONFIG_SPARSE_IRQ=y
 # CONFIG_GENERIC_IRQ_DEBUGFS is not set
+# end of IRQ subsystem
+
 CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
@@ -75,6 +79,8 @@ CONFIG_NO_HZ_IDLE=y
 # CONFIG_NO_HZ_FULL is not set
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
+# end of Timers subsystem
+
 # CONFIG_PREEMPT_NONE is not set
 # CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
@@ -87,7 +93,13 @@ CONFIG_TICK_CPU_ACCOUNTING=y
 # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
 # CONFIG_IRQ_TIME_ACCOUNTING is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
+CONFIG_TASKSTATS=y
+# CONFIG_TASK_DELAY_ACCT is not set
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+# CONFIG_PSI is not set
+# end of CPU/Task time and stats accounting
+
 CONFIG_CPU_ISOLATION=y
 
 #
@@ -100,48 +112,55 @@ CONFIG_TREE_SRCU=y
 CONFIG_TASKS_RCU=y
 CONFIG_RCU_STALL_COMMON=y
 CONFIG_RCU_NEED_SEGCBLIST=y
-# CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=17
+# end of RCU Subsystem
+
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_IKHEADERS is not set
+CONFIG_LOG_BUF_SHIFT=18
 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_CGROUPS=y
-CONFIG_PAGE_COUNTER=y
-CONFIG_MEMCG=y
-CONFIG_MEMCG_SWAP=y
-# CONFIG_MEMCG_SWAP_ENABLED is not set
-CONFIG_MEMCG_KMEM=y
+# CONFIG_MEMCG is not set
 CONFIG_BLK_CGROUP=y
 # CONFIG_DEBUG_BLK_CGROUP is not set
-CONFIG_CGROUP_WRITEBACK=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_CFS_BANDWIDTH=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_CGROUP_PIDS=y
+CONFIG_RT_GROUP_SCHED=y
+# CONFIG_CGROUP_PIDS is not set
 # CONFIG_CGROUP_RDMA is not set
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
 CONFIG_PROC_PID_CPUSET=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
-# CONFIG_CGROUP_BPF is not set
+# CONFIG_CGROUP_PERF is not set
+CONFIG_CGROUP_BPF=y
 # CONFIG_CGROUP_DEBUG is not set
+CONFIG_SOCK_CGROUP_DATA=y
 CONFIG_NAMESPACES=y
 CONFIG_UTS_NS=y
 CONFIG_IPC_NS=y
-# CONFIG_USER_NS is not set
+CONFIG_USER_NS=y
 CONFIG_PID_NS=y
 CONFIG_NET_NS=y
 # CONFIG_CHECKPOINT_RESTORE is not set
-CONFIG_SCHED_AUTOGROUP=y
+# CONFIG_SCHED_AUTOGROUP is not set
 # CONFIG_SYSFS_DEPRECATED is not set
 CONFIG_RELAY=y
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_RD_XZ=y
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
 # CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
-CONFIG_ANON_INODES=y
 CONFIG_HAVE_UID16=y
 CONFIG_BPF=y
 CONFIG_EXPERT=y
@@ -165,14 +184,15 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_IO_URING=y
 CONFIG_ADVISE_SYSCALLS=y
 CONFIG_MEMBARRIER=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 CONFIG_KALLSYMS_BASE_RELATIVE=y
 CONFIG_BPF_SYSCALL=y
-# CONFIG_BPF_JIT_ALWAYS_ON is not set
-CONFIG_USERFAULTFD=y
+CONFIG_BPF_JIT_ALWAYS_ON=y
+# CONFIG_USERFAULTFD is not set
 CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
 CONFIG_RSEQ=y
 # CONFIG_DEBUG_RSEQ is not set
@@ -184,10 +204,12 @@ CONFIG_PERF_USE_VMALLOC=y
 #
 # Kernel Performance Events And Counters
 #
-# CONFIG_PERF_EVENTS is not set
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+# end of Kernel Performance Events And Counters
+
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
+CONFIG_SLUB_DEBUG=y
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
@@ -195,29 +217,29 @@ CONFIG_SLUB=y
 CONFIG_SLAB_MERGE_DEFAULT=y
 # CONFIG_SLAB_FREELIST_RANDOM is not set
 # CONFIG_SLAB_FREELIST_HARDENED is not set
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
 CONFIG_SLUB_CPU_PARTIAL=y
 CONFIG_SYSTEM_DATA_VERIFICATION=y
-# CONFIG_PROFILING is not set
+CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
+# end of General setup
+
 CONFIG_ARM=y
 CONFIG_ARM_HAS_SG_CHAIN=y
 CONFIG_ARM_DMA_USE_IOMMU=y
 CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
-CONFIG_MIGHT_HAVE_PCI=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_HAVE_PROC_CPU=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_FIX_EARLYCON_MEM=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ZONE_DMA=y
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARM_PATCH_PHYS_VIRT=y
 CONFIG_GENERIC_BUG=y
-CONFIG_PGTABLE_LEVELS=3
+CONFIG_PGTABLE_LEVELS=2
 
 #
 # System Type
@@ -255,12 +277,13 @@ CONFIG_ARCH_MULTIPLATFORM=y
 # CONFIG_ARCH_MULTI_V6 is not set
 CONFIG_ARCH_MULTI_V7=y
 CONFIG_ARCH_MULTI_V6_V7=y
+# end of Multiple platform selection
+
 # CONFIG_ARCH_VIRT is not set
 # CONFIG_ARCH_ACTIONS is not set
 # CONFIG_ARCH_ALPINE is not set
 # CONFIG_ARCH_ARTPEC is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_AXXIA is not set
 # CONFIG_ARCH_BCM is not set
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_DIGICOLOR is not set
@@ -271,6 +294,7 @@ CONFIG_ARCH_MULTI_V6_V7=y
 # CONFIG_ARCH_KEYSTONE is not set
 # CONFIG_ARCH_MEDIATEK is not set
 # CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MILBEAUT is not set
 # CONFIG_ARCH_MMP is not set
 # CONFIG_ARCH_MVEBU is not set
 # CONFIG_ARCH_NPCM is not set
@@ -284,8 +308,11 @@ CONFIG_ARCH_MULTI_V6_V7=y
 # CONFIG_SOC_AM33XX is not set
 # CONFIG_SOC_AM43XX is not set
 # CONFIG_SOC_DRA7XX is not set
+# end of TI OMAP/AM/DM/DRA Family
+
 # CONFIG_ARCH_SIRF is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_RDA is not set
 # CONFIG_ARCH_REALVIEW is not set
 CONFIG_ARCH_ROCKCHIP=y
 # CONFIG_ARCH_S5PV210 is not set
@@ -324,7 +351,7 @@ CONFIG_CPU_CP15_MMU=y
 #
 # Processor Features
 #
-CONFIG_ARM_LPAE=y
+# CONFIG_ARM_LPAE is not set
 CONFIG_ARM_THUMB=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_VIRT_EXT=y
@@ -339,91 +366,38 @@ CONFIG_OUTER_CACHE=y
 CONFIG_OUTER_CACHE_SYNC=y
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_CACHE_L2X0=y
-CONFIG_PL310_ERRATA_588369=y
-CONFIG_PL310_ERRATA_727915=y
-CONFIG_PL310_ERRATA_753970=y
-CONFIG_PL310_ERRATA_769419=y
+# CONFIG_CACHE_L2X0_PMU is not set
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+# CONFIG_PL310_ERRATA_753970 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
 CONFIG_ARM_L1_CACHE_SHIFT_6=y
 CONFIG_ARM_L1_CACHE_SHIFT=6
 CONFIG_ARM_DMA_MEM_BUFFERABLE=y
 CONFIG_ARM_HEAVY_MB=y
 CONFIG_DEBUG_ALIGN_RODATA=y
-CONFIG_ARM_ERRATA_430973=y
-CONFIG_ARM_ERRATA_643719=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_754327=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_ERRATA_798181=y
-CONFIG_ARM_ERRATA_773022=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_643719 is not set
+# CONFIG_ARM_ERRATA_720789 is not set
+# CONFIG_ARM_ERRATA_754322 is not set
+# CONFIG_ARM_ERRATA_754327 is not set
+# CONFIG_ARM_ERRATA_764369 is not set
+# CONFIG_ARM_ERRATA_775420 is not set
+# CONFIG_ARM_ERRATA_798181 is not set
+# CONFIG_ARM_ERRATA_773022 is not set
 CONFIG_ARM_ERRATA_818325_852422=y
 CONFIG_ARM_ERRATA_821420=y
 CONFIG_ARM_ERRATA_825619=y
-CONFIG_ARM_ERRATA_857271=y
-CONFIG_ARM_ERRATA_CR711784_A12=y
+# CONFIG_ARM_ERRATA_857271 is not set
 # CONFIG_ARM_ERRATA_852421 is not set
 # CONFIG_ARM_ERRATA_852423 is not set
 # CONFIG_ARM_ERRATA_857272 is not set
-# CONFIG_ARM_ERRATA_CR711784_A17 is not set
+# end of System Type
 
 #
 # Bus support
 #
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_SYSCALL=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCIEAER=y
-# CONFIG_PCIEAER_INJECT is not set
-# CONFIG_PCIE_ECRC is not set
-CONFIG_PCIEASPM=y
-# CONFIG_PCIEASPM_DEBUG is not set
-CONFIG_PCIEASPM_DEFAULT=y
-# CONFIG_PCIEASPM_POWERSAVE is not set
-# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
-# CONFIG_PCIEASPM_PERFORMANCE is not set
-CONFIG_PCIE_PME=y
-# CONFIG_PCIE_DPC is not set
-# CONFIG_PCIE_PTM is not set
-# CONFIG_PCI_MSI is not set
-CONFIG_PCI_QUIRKS=y
-# CONFIG_PCI_DEBUG is not set
-# CONFIG_PCI_STUB is not set
-# CONFIG_PCI_IOV is not set
-# CONFIG_PCI_PRI is not set
-# CONFIG_PCI_PASID is not set
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# PCI controller drivers
-#
-
-#
-# Cadence PCIe controllers support
-#
-# CONFIG_PCIE_CADENCE_HOST is not set
-# CONFIG_PCI_FTPCI100 is not set
-# CONFIG_PCI_HOST_GENERIC is not set
-# CONFIG_PCIE_XILINX is not set
-# CONFIG_PCI_V3_SEMI is not set
-# CONFIG_PCIE_ALTERA is not set
-
-#
-# DesignWare PCI Core Support
-#
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-
-#
-# PCI switch controller drivers
-#
-# CONFIG_PCI_SW_SWITCHTEC is not set
-# CONFIG_PCCARD is not set
+# end of Bus support
 
 #
 # Kernel Features
@@ -432,7 +406,7 @@ CONFIG_HAVE_SMP=y
 CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
 CONFIG_ARM_CPU_TOPOLOGY=y
-CONFIG_SCHED_MC=y
+# CONFIG_SCHED_MC is not set
 # CONFIG_SCHED_SMT is not set
 CONFIG_HAVE_ARM_SCU=y
 CONFIG_HAVE_ARM_ARCH_TIMER=y
@@ -440,41 +414,42 @@ CONFIG_HAVE_ARM_TWD=y
 # CONFIG_MCPM is not set
 # CONFIG_BIG_LITTLE is not set
 CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_3G_OPT is not set
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_NR_CPUS=4
 CONFIG_HOTPLUG_CPU=y
-CONFIG_ARM_PSCI=y
+# CONFIG_ARM_PSCI is not set
 CONFIG_ARCH_NR_GPIO=288
 CONFIG_HZ_FIXED=0
 # CONFIG_HZ_100 is not set
 # CONFIG_HZ_200 is not set
-# CONFIG_HZ_250 is not set
+CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_500 is not set
-CONFIG_HZ_1000=y
-CONFIG_HZ=1000
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 # CONFIG_THUMB2_KERNEL is not set
 CONFIG_ARM_PATCH_IDIV=y
 CONFIG_AEABI=y
 # CONFIG_OABI_COMPAT is not set
 CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_GENERIC_GUP=y
 CONFIG_HIGHMEM=y
-CONFIG_HIGHPTE=y
-CONFIG_SYS_SUPPORTS_HUGETLBFS=y
-CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+# CONFIG_HIGHPTE is not set
+CONFIG_CPU_SW_DOMAIN_PAN=y
+CONFIG_HW_PERF_EVENTS=y
 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
 # CONFIG_ARM_MODULE_PLTS is not set
-CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_FORCE_MAX_ZONEORDER=11
 CONFIG_ALIGNMENT_TRAP=y
 # CONFIG_UACCESS_WITH_MEMCPY is not set
 CONFIG_SECCOMP=y
 # CONFIG_PARAVIRT is not set
 # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
 # CONFIG_XEN is not set
+# end of Kernel Features
 
 #
 # Boot options
@@ -484,12 +459,13 @@ CONFIG_ATAGS=y
 # CONFIG_DEPRECATED_PARAM_STRUCT is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+# CONFIG_ARM_APPENDED_DTB is not set
 CONFIG_CMDLINE=""
+# CONFIG_KEXEC is not set
 # CONFIG_CRASH_DUMP is not set
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_EFI is not set
+# end of Boot options
 
 #
 # CPU Power Management
@@ -501,19 +477,19 @@ CONFIG_AUTO_ZRELADDR=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_GOV_ATTR_SET=y
 CONFIG_CPU_FREQ_GOV_COMMON=y
-# CONFIG_CPU_FREQ_STAT is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
 # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
 # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
 # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
 # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
 CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
 # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 
 #
 # CPU frequency scaling drivers
@@ -522,21 +498,23 @@ CONFIG_CPUFREQ_DT=y
 CONFIG_CPUFREQ_DT_PLATDEV=y
 # CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
 # CONFIG_QORIQ_CPUFREQ is not set
+# end of CPU Frequency scaling
 
 #
 # CPU Idle
 #
 CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
-CONFIG_DT_IDLE_STATES=y
+# CONFIG_CPU_IDLE_GOV_TEO is not set
 
 #
 # ARM CPU Idle Drivers
 #
-CONFIG_ARM_CPUIDLE=y
-# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
+# CONFIG_ARM_CPUIDLE is not set
+# end of ARM CPU Idle Drivers
+# end of CPU Idle
+# end of CPU Power Management
 
 #
 # Floating point emulation
@@ -549,54 +527,83 @@ CONFIG_VFP=y
 CONFIG_VFPv3=y
 CONFIG_NEON=y
 CONFIG_KERNEL_MODE_NEON=y
+# end of Floating point emulation
 
 #
 # Power management options
 #
-# CONFIG_SUSPEND is not set
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_SUSPEND_SKIP_SYNC is not set
 # CONFIG_HIBERNATION is not set
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+# CONFIG_PM_AUTOSLEEP is not set
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PM_WAKELOCKS_GC=y
 CONFIG_PM=y
-# CONFIG_PM_DEBUG is not set
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_DPM_WATCHDOG is not set
 # CONFIG_APM_EMULATION is not set
 CONFIG_PM_CLK=y
 CONFIG_PM_GENERIC_DOMAINS=y
 # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
 CONFIG_PM_GENERIC_DOMAINS_OF=y
 CONFIG_CPU_PM=y
+# CONFIG_ENERGY_MODEL is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARM_CPU_SUSPEND=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# end of Power management options
 
 #
 # Firmware Drivers
 #
-CONFIG_ARM_PSCI_FW=y
-# CONFIG_ARM_PSCI_CHECKER is not set
-# CONFIG_ARM_SCMI_PROTOCOL is not set
-CONFIG_ARM_SCPI_PROTOCOL=y
-CONFIG_ARM_SCPI_POWER_DOMAIN=y
 # CONFIG_FIRMWARE_MEMMAP is not set
 # CONFIG_FW_CFG_SYSFS is not set
+# CONFIG_TRUSTED_FOUNDATIONS is not set
 CONFIG_HAVE_ARM_SMCCC=y
-# CONFIG_GOOGLE_FIRMWARE is not set
+CONFIG_GOOGLE_FIRMWARE=y
+# CONFIG_GOOGLE_COREBOOT_TABLE is not set
 
 #
 # Tegra firmware driver
 #
-# CONFIG_ARM_CRYPTO is not set
+# end of Tegra firmware driver
+# end of Firmware Drivers
+
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM=y
+CONFIG_CRYPTO_SHA1_ARM_NEON=y
+# CONFIG_CRYPTO_SHA1_ARM_CE is not set
+# CONFIG_CRYPTO_SHA2_ARM_CE is not set
+CONFIG_CRYPTO_SHA256_ARM=y
+CONFIG_CRYPTO_SHA512_ARM=y
+CONFIG_CRYPTO_AES_ARM=y
+CONFIG_CRYPTO_AES_ARM_BS=y
+# CONFIG_CRYPTO_AES_ARM_CE is not set
+# CONFIG_CRYPTO_GHASH_ARM_CE is not set
+# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set
+# CONFIG_CRYPTO_CRC32_ARM_CE is not set
+# CONFIG_CRYPTO_CHACHA20_NEON is not set
+# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
 # CONFIG_VIRTUALIZATION is not set
 
 #
 # General architecture-dependent options
 #
+# CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
-CONFIG_KPROBES=y
-CONFIG_JUMP_LABEL=y
-# CONFIG_STATIC_KEYS_SELFTEST is not set
-CONFIG_OPTPROBES=y
+# CONFIG_KPROBES is not set
+# CONFIG_JUMP_LABEL is not set
+CONFIG_UPROBES=y
 CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_KRETPROBES=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_OPTPROBES=y
@@ -606,15 +613,17 @@ CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
 CONFIG_ARCH_HAS_SET_MEMORY=y
 CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
 CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_HW_BREAKPOINT=y
 CONFIG_HAVE_PERF_REGS=y
 CONFIG_HAVE_PERF_USER_STACK_DUMP=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_RCU_TABLE_FREE=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_SECCOMP_FILTER=y
@@ -630,10 +639,12 @@ CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
 CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
 CONFIG_HAVE_EXIT_THREAD=y
-CONFIG_ARCH_MMAP_RND_BITS=8
+CONFIG_ARCH_MMAP_RND_BITS=16
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_OLD_SIGSUSPEND3=y
 CONFIG_OLD_SIGACTION=y
+CONFIG_64BIT_TIME=y
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
 CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
 CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
@@ -642,14 +653,19 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
 CONFIG_STRICT_MODULE_RWX=y
 CONFIG_ARCH_HAS_PHYS_TO_DMA=y
 CONFIG_REFCOUNT_FULL=y
+# CONFIG_LOCK_EVENT_COUNTS is not set
 
 #
 # GCOV-based kernel profiling
 #
 # CONFIG_GCOV_KERNEL is not set
 CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+# end of GCOV-based kernel profiling
+
 CONFIG_PLUGIN_HOSTCC=""
 CONFIG_HAVE_GCC_PLUGINS=y
+# end of General architecture-dependent options
+
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -663,11 +679,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_TRIM_UNUSED_KSYMS is not set
 CONFIG_MODULES_TREE_LOOKUP=y
 CONFIG_BLOCK=y
-CONFIG_LBDAF=y
 CONFIG_BLK_SCSI_REQUEST=y
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_BSGLIB is not set
-CONFIG_BLK_DEV_INTEGRITY=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
 # CONFIG_BLK_DEV_ZONED is not set
 # CONFIG_BLK_DEV_THROTTLING is not set
 # CONFIG_BLK_CMDLINE_PARSER is not set
@@ -685,7 +700,7 @@ CONFIG_PARTITION_ADVANCED=y
 # CONFIG_OSF_PARTITION is not set
 # CONFIG_AMIGA_PARTITION is not set
 # CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
+CONFIG_MAC_PARTITION=y
 CONFIG_MSDOS_PARTITION=y
 # CONFIG_BSD_DISKLABEL is not set
 # CONFIG_MINIX_SUBPARTITION is not set
@@ -699,21 +714,19 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_EFI_PARTITION=y
 # CONFIG_SYSV68_PARTITION is not set
 # CONFIG_CMDLINE_PARTITION is not set
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BLK_MQ_VIRTIO=y
+# end of Partition Types
+
+CONFIG_BLK_PM=y
 
 #
 # IO Schedulers
 #
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_DEFAULT_DEADLINE=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="deadline"
 CONFIG_MQ_IOSCHED_DEADLINE=y
 CONFIG_MQ_IOSCHED_KYBER=y
-# CONFIG_IOSCHED_BFQ is not set
+CONFIG_IOSCHED_BFQ=y
+CONFIG_BFQ_GROUP_IOSCHED=y
+# end of IO Schedulers
+
 CONFIG_ASN1=y
 CONFIG_UNINLINE_SPIN_UNLOCK=y
 CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
@@ -731,104 +744,135 @@ CONFIG_ELFCORE=y
 CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
 CONFIG_BINFMT_SCRIPT=y
 # CONFIG_BINFMT_FLAT is not set
-CONFIG_BINFMT_MISC=m
+CONFIG_BINFMT_MISC=y
 CONFIG_COREDUMP=y
+# end of Executable file formats
 
 #
 # Memory Management options
 #
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_MEMORY_ISOLATION=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_COMPACTION=y
 CONFIG_MIGRATION=y
-CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_BOUNCE=y
-CONFIG_KSM=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-CONFIG_TRANSPARENT_HUGEPAGE=y
-# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set
-CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
-CONFIG_TRANSPARENT_HUGE_PAGECACHE=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
 # CONFIG_CLEANCACHE is not set
-CONFIG_FRONTSWAP=y
-CONFIG_CMA=y
-# CONFIG_CMA_DEBUG is not set
-# CONFIG_CMA_DEBUGFS is not set
-CONFIG_CMA_AREAS=7
-CONFIG_ZSWAP=y
-CONFIG_ZPOOL=y
-CONFIG_ZBUD=y
-# CONFIG_Z3FOLD is not set
+# CONFIG_FRONTSWAP is not set
+# CONFIG_CMA is not set
+# CONFIG_ZPOOL is not set
+# CONFIG_ZBUD is not set
 CONFIG_ZSMALLOC=y
 # CONFIG_PGTABLE_MAPPING is not set
 # CONFIG_ZSMALLOC_STAT is not set
 CONFIG_GENERIC_EARLY_IOREMAP=y
 # CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_FRAME_VECTOR=y
 # CONFIG_PERCPU_STATS is not set
 # CONFIG_GUP_BENCHMARK is not set
-CONFIG_ARCH_HAS_PTE_SPECIAL=y
+# end of Memory Management options
+
 CONFIG_NET=y
 CONFIG_NET_INGRESS=y
+CONFIG_NET_EGRESS=y
+CONFIG_SKB_EXTENSIONS=y
 
 #
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_DIAG=y
+# CONFIG_PACKET_DIAG is not set
 CONFIG_UNIX=y
-CONFIG_UNIX_DIAG=y
+CONFIG_UNIX_SCM=y
+# CONFIG_UNIX_DIAG is not set
 # CONFIG_TLS is not set
 CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
 # CONFIG_XFRM_INTERFACE is not set
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
 # CONFIG_XFRM_STATISTICS is not set
-# CONFIG_NET_KEY is not set
+CONFIG_XFRM_IPCOMP=y
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
 # CONFIG_XDP_SOCKETS is not set
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_FIB_TRIE_STATS is not set
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
 # CONFIG_IP_PNP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE_DEMUX is not set
-# CONFIG_IP_MROUTE is not set
+CONFIG_NET_IP_TUNNEL=y
+CONFIG_IP_MROUTE_COMMON=y
+CONFIG_IP_MROUTE=y
+# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
 CONFIG_SYN_COOKIES=y
+# CONFIG_NET_IPVTI is not set
 # CONFIG_NET_FOU is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_TCP_CONG_ADVANCED is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_ESP_OFFLOAD is not set
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_UDP_DIAG=y
+# CONFIG_INET_RAW_DIAG is not set
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_TCP_CONG_ADVANCED=y
+# CONFIG_TCP_CONG_BIC is not set
 CONFIG_TCP_CONG_CUBIC=y
+# CONFIG_TCP_CONG_WESTWOOD is not set
+# CONFIG_TCP_CONG_HTCP is not set
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_NV is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+CONFIG_TCP_CONG_LP=y
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_TCP_CONG_DCTCP is not set
+# CONFIG_TCP_CONG_CDG is not set
+# CONFIG_TCP_CONG_BBR is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_RENO is not set
 CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
+CONFIG_TCP_MD5SIG=y
 CONFIG_IPV6=y
 CONFIG_IPV6_ROUTER_PREF=y
 CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-# CONFIG_INET6_AH is not set
-# CONFIG_INET6_ESP is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+# CONFIG_INET6_ESP_OFFLOAD is not set
 # CONFIG_INET6_IPCOMP is not set
-CONFIG_IPV6_MIP6=m
+# CONFIG_IPV6_MIP6 is not set
 # CONFIG_IPV6_ILA is not set
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
-# CONFIG_IPV6_SIT is not set
+# CONFIG_IPV6_VTI is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_IPV6_TUNNEL is not set
-# CONFIG_IPV6_MULTIPLE_TABLES is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+# CONFIG_IPV6_SUBTREES is not set
 # CONFIG_IPV6_MROUTE is not set
 # CONFIG_IPV6_SEG6_LWTUNNEL is not set
 # CONFIG_IPV6_SEG6_HMAC is not set
+# CONFIG_NETLABEL is not set
 CONFIG_NETWORK_SECMARK=y
 CONFIG_NET_PTP_CLASSIFY=y
 # CONFIG_NETWORK_PHY_TIMESTAMPING is not set
@@ -840,109 +884,134 @@ CONFIG_NETFILTER_ADVANCED=y
 # Core Netfilter Configuration
 #
 CONFIG_NETFILTER_INGRESS=y
+CONFIG_NETFILTER_NETLINK=y
 # CONFIG_NETFILTER_NETLINK_ACCT is not set
-# CONFIG_NETFILTER_NETLINK_QUEUE is not set
-# CONFIG_NETFILTER_NETLINK_LOG is not set
+CONFIG_NETFILTER_NETLINK_QUEUE=y
+CONFIG_NETFILTER_NETLINK_LOG=y
 # CONFIG_NETFILTER_NETLINK_OSF is not set
 CONFIG_NF_CONNTRACK=y
 # CONFIG_NF_LOG_NETDEV is not set
+CONFIG_NETFILTER_CONNCOUNT=y
 CONFIG_NF_CONNTRACK_MARK=y
 CONFIG_NF_CONNTRACK_SECMARK=y
 # CONFIG_NF_CONNTRACK_ZONES is not set
 CONFIG_NF_CONNTRACK_PROCFS=y
 CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CONNTRACK_TIMEOUT=y
-CONFIG_NF_CONNTRACK_TIMESTAMP=y
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
 # CONFIG_NF_CONNTRACK_LABELS is not set
 # CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=y
 # CONFIG_NF_CT_PROTO_SCTP is not set
 # CONFIG_NF_CT_PROTO_UDPLITE is not set
 # CONFIG_NF_CONNTRACK_AMANDA is not set
-# CONFIG_NF_CONNTRACK_FTP is not set
+CONFIG_NF_CONNTRACK_FTP=y
 # CONFIG_NF_CONNTRACK_H323 is not set
 # CONFIG_NF_CONNTRACK_IRC is not set
 # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
 # CONFIG_NF_CONNTRACK_SNMP is not set
-# CONFIG_NF_CONNTRACK_PPTP is not set
+CONFIG_NF_CONNTRACK_PPTP=y
 # CONFIG_NF_CONNTRACK_SANE is not set
 # CONFIG_NF_CONNTRACK_SIP is not set
-# CONFIG_NF_CONNTRACK_TFTP is not set
-# CONFIG_NF_CT_NETLINK is not set
-# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NF_CT_NETLINK_TIMEOUT=y
+CONFIG_NF_CT_NETLINK_HELPER=y
+CONFIG_NETFILTER_NETLINK_GLUE_CT=y
+CONFIG_NF_NAT=y
+CONFIG_NF_NAT_FTP=y
+CONFIG_NF_NAT_TFTP=y
+CONFIG_NF_NAT_REDIRECT=y
+CONFIG_NF_NAT_MASQUERADE=y
 # CONFIG_NF_TABLES is not set
 CONFIG_NETFILTER_XTABLES=y
 
 #
 # Xtables combined modules
 #
-# CONFIG_NETFILTER_XT_MARK is not set
-# CONFIG_NETFILTER_XT_CONNMARK is not set
+CONFIG_NETFILTER_XT_MARK=y
+CONFIG_NETFILTER_XT_CONNMARK=y
 
 #
 # Xtables targets
 #
-# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
-# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
-# CONFIG_NETFILTER_XT_TARGET_CONNSECMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+CONFIG_NETFILTER_XT_TARGET_CT=y
+CONFIG_NETFILTER_XT_TARGET_DSCP=y
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
 # CONFIG_NETFILTER_XT_TARGET_HMARK is not set
-# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
 # CONFIG_NETFILTER_XT_TARGET_LED is not set
 # CONFIG_NETFILTER_XT_TARGET_LOG is not set
-# CONFIG_NETFILTER_XT_TARGET_MARK is not set
-# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
-# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_NAT=y
+# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
 # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
+CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
 # CONFIG_NETFILTER_XT_TARGET_TEE is not set
-# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
-# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
 
 #
 # Xtables matches
 #
-# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
-# CONFIG_NETFILTER_XT_MATCH_BPF is not set
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
+CONFIG_NETFILTER_XT_MATCH_BPF=y
 # CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
 # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
-# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
 # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
 # CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
-# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
-# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
 # CONFIG_NETFILTER_XT_MATCH_CPU is not set
 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
 # CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
-# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_DSCP=y
 # CONFIG_NETFILTER_XT_MATCH_ECN is not set
 # CONFIG_NETFILTER_XT_MATCH_ESP is not set
-# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
-# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
 # CONFIG_NETFILTER_XT_MATCH_HL is not set
 # CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
-# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
 # CONFIG_NETFILTER_XT_MATCH_L2TP is not set
-# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
-# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
-# CONFIG_NETFILTER_XT_MATCH_MAC is not set
-# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
 # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
 # CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
 # CONFIG_NETFILTER_XT_MATCH_OSF is not set
 # CONFIG_NETFILTER_XT_MATCH_OWNER is not set
-# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
-# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
-# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
 # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
 # CONFIG_NETFILTER_XT_MATCH_REALM is not set
 # CONFIG_NETFILTER_XT_MATCH_RECENT is not set
 # CONFIG_NETFILTER_XT_MATCH_SCTP is not set
-# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
-# CONFIG_NETFILTER_XT_MATCH_STATE is not set
-# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
-# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
 # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
-# CONFIG_NETFILTER_XT_MATCH_TIME is not set
-# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+# end of Core Netfilter Configuration
+
 # CONFIG_IP_SET is not set
 # CONFIG_IP_VS is not set
 
@@ -950,35 +1019,65 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
 # IP: Netfilter Configuration
 #
 CONFIG_NF_DEFRAG_IPV4=y
-# CONFIG_NF_SOCKET_IPV4 is not set
-# CONFIG_NF_TPROXY_IPV4 is not set
+CONFIG_NF_SOCKET_IPV4=y
+CONFIG_NF_TPROXY_IPV4=y
 # CONFIG_NF_DUP_IPV4 is not set
 # CONFIG_NF_LOG_ARP is not set
 # CONFIG_NF_LOG_IPV4 is not set
-# CONFIG_NF_REJECT_IPV4 is not set
-# CONFIG_NF_NAT_IPV4 is not set
+CONFIG_NF_REJECT_IPV4=y
+CONFIG_NF_NAT_PPTP=y
 CONFIG_IP_NF_IPTABLES=y
 # CONFIG_IP_NF_MATCH_AH is not set
 # CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_RPFILTER is not set
 # CONFIG_IP_NF_MATCH_TTL is not set
 CONFIG_IP_NF_FILTER=y
-# CONFIG_IP_NF_TARGET_REJECT is not set
+CONFIG_IP_NF_TARGET_REJECT=y
 # CONFIG_IP_NF_TARGET_SYNPROXY is not set
-# CONFIG_IP_NF_NAT is not set
-# CONFIG_IP_NF_MANGLE is not set
-# CONFIG_IP_NF_RAW is not set
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+# CONFIG_IP_NF_TARGET_NETMAP is not set
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
 # CONFIG_IP_NF_ARPTABLES is not set
+# end of IP: Netfilter Configuration
 
 #
 # IPv6: Netfilter Configuration
 #
-# CONFIG_NF_SOCKET_IPV6 is not set
-# CONFIG_NF_TPROXY_IPV6 is not set
+CONFIG_NF_SOCKET_IPV6=y
+CONFIG_NF_TPROXY_IPV6=y
 # CONFIG_NF_DUP_IPV6 is not set
-# CONFIG_NF_REJECT_IPV6 is not set
+CONFIG_NF_REJECT_IPV6=y
 # CONFIG_NF_LOG_IPV6 is not set
-# CONFIG_NF_NAT_IPV6 is not set
-# CONFIG_IP6_NF_IPTABLES is not set
+CONFIG_IP6_NF_IPTABLES=y
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
+# CONFIG_IP6_NF_MATCH_FRAG is not set
+# CONFIG_IP6_NF_MATCH_OPTS is not set
+# CONFIG_IP6_NF_MATCH_HL is not set
+CONFIG_IP6_NF_MATCH_IPV6HEADER=y
+# CONFIG_IP6_NF_MATCH_MH is not set
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+# CONFIG_IP6_NF_MATCH_RT is not set
+# CONFIG_IP6_NF_MATCH_SRH is not set
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+# CONFIG_IP6_NF_SECURITY is not set
+CONFIG_IP6_NF_NAT=y
+CONFIG_IP6_NF_TARGET_MASQUERADE=y
+# CONFIG_IP6_NF_TARGET_NPT is not set
+# end of IPv6: Netfilter Configuration
+
 CONFIG_NF_DEFRAG_IPV6=y
 # CONFIG_BRIDGE_NF_EBTABLES is not set
 # CONFIG_BPFILTER is not set
@@ -988,8 +1087,8 @@ CONFIG_NF_DEFRAG_IPV6=y
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_L2TP is not set
-CONFIG_STP=m
-CONFIG_BRIDGE=m
+CONFIG_STP=y
+CONFIG_BRIDGE=y
 CONFIG_BRIDGE_IGMP_SNOOPING=y
 CONFIG_HAVE_NET_DSA=y
 # CONFIG_NET_DSA is not set
@@ -997,16 +1096,89 @@ CONFIG_HAVE_NET_DSA=y
 # CONFIG_DECNET is not set
 CONFIG_LLC=y
 # CONFIG_LLC2 is not set
-CONFIG_ATALK=y
-# CONFIG_DEV_APPLETALK is not set
+# CONFIG_ATALK is not set
 # CONFIG_X25 is not set
 # CONFIG_LAPB is not set
 # CONFIG_PHONET is not set
 # CONFIG_6LOWPAN is not set
 # CONFIG_IEEE802154 is not set
-# CONFIG_NET_SCHED is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+CONFIG_NET_SCH_HTB=y
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFB is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_CBS is not set
+# CONFIG_NET_SCH_ETF is not set
+# CONFIG_NET_SCH_TAPRIO is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+# CONFIG_NET_SCH_MQPRIO is not set
+# CONFIG_NET_SCH_SKBPRIO is not set
+# CONFIG_NET_SCH_CHOKE is not set
+# CONFIG_NET_SCH_QFQ is not set
+CONFIG_NET_SCH_CODEL=y
+CONFIG_NET_SCH_FQ_CODEL=y
+# CONFIG_NET_SCH_CAKE is not set
+# CONFIG_NET_SCH_FQ is not set
+# CONFIG_NET_SCH_HHF is not set
+# CONFIG_NET_SCH_PIE is not set
+CONFIG_NET_SCH_INGRESS=y
+# CONFIG_NET_SCH_PLUG is not set
+# CONFIG_NET_SCH_DEFAULT is not set
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+CONFIG_NET_CLS_U32=y
+# CONFIG_CLS_U32_PERF is not set
+CONFIG_CLS_U32_MARK=y
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_CLS_CGROUP is not set
+# CONFIG_NET_CLS_BPF is not set
+# CONFIG_NET_CLS_FLOWER is not set
+# CONFIG_NET_CLS_MATCHALL is not set
+# CONFIG_NET_EMATCH is not set
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+# CONFIG_GACT_PROB is not set
+# CONFIG_NET_ACT_MIRRED is not set
+# CONFIG_NET_ACT_SAMPLE is not set
+# CONFIG_NET_ACT_IPT is not set
+# CONFIG_NET_ACT_NAT is not set
+# CONFIG_NET_ACT_PEDIT is not set
+# CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
+# CONFIG_NET_ACT_CSUM is not set
+# CONFIG_NET_ACT_VLAN is not set
+# CONFIG_NET_ACT_BPF is not set
+# CONFIG_NET_ACT_CONNMARK is not set
+# CONFIG_NET_ACT_SKBMOD is not set
+# CONFIG_NET_ACT_IFE is not set
+# CONFIG_NET_ACT_TUNNEL_KEY is not set
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_SCH_FIFO=y
 # CONFIG_DCB is not set
-# CONFIG_DNS_RESOLVER is not set
+CONFIG_DNS_RESOLVER=y
 # CONFIG_BATMAN_ADV is not set
 # CONFIG_OPENVSWITCH is not set
 # CONFIG_VSOCKETS is not set
@@ -1033,65 +1205,94 @@ CONFIG_NET_FLOW_LIMIT=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_NET_DROP_MONITOR is not set
+# end of Network testing
+# end of Networking options
+
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 CONFIG_BT=y
 CONFIG_BT_BREDR=y
 CONFIG_BT_RFCOMM=y
 # CONFIG_BT_RFCOMM_TTY is not set
-CONFIG_BT_BNEP=y
-# CONFIG_BT_BNEP_MC_FILTER is not set
-CONFIG_BT_BNEP_PROTO_FILTER=y
+# CONFIG_BT_BNEP is not set
 CONFIG_BT_HIDP=y
 CONFIG_BT_HS=y
 CONFIG_BT_LE=y
 # CONFIG_BT_LEDS is not set
 # CONFIG_BT_SELFTEST is not set
-# CONFIG_BT_DEBUGFS is not set
+CONFIG_BT_DEBUGFS=y
 
 #
 # Bluetooth device drivers
 #
 CONFIG_BT_INTEL=y
+CONFIG_BT_RTL=y
 CONFIG_BT_HCIBTUSB=y
 # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
 # CONFIG_BT_HCIBTUSB_BCM is not set
-# CONFIG_BT_HCIBTUSB_RTL is not set
-# CONFIG_BT_HCIBTSDIO is not set
-# CONFIG_BT_HCIUART is not set
+CONFIG_BT_HCIBTUSB_RTL=y
+CONFIG_BT_HCIBTSDIO=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+CONFIG_BT_HCIUART_ATH3K=y
+# CONFIG_BT_HCIUART_INTEL is not set
+# CONFIG_BT_HCIUART_AG6XX is not set
+# CONFIG_BT_HCIUART_MRVL is not set
 # CONFIG_BT_HCIBCM203X is not set
 # CONFIG_BT_HCIBPA10X is not set
-# CONFIG_BT_HCIBFUSB is not set
-# CONFIG_BT_HCIVHCI is not set
-# CONFIG_BT_MRVL is not set
+CONFIG_BT_HCIBFUSB=y
+CONFIG_BT_HCIVHCI=y
+CONFIG_BT_MRVL=y
+CONFIG_BT_MRVL_SDIO=y
 # CONFIG_BT_ATH3K is not set
+# CONFIG_BT_MTKSDIO is not set
+# end of Bluetooth device drivers
+
 # CONFIG_AF_RXRPC is not set
 # CONFIG_AF_KCM is not set
+CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
 CONFIG_WEXT_CORE=y
 CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
 CONFIG_CFG80211=y
-# CONFIG_NL80211_TESTMODE is not set
+CONFIG_NL80211_TESTMODE=y
 # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_CERTIFICATION_ONUS is not set
 CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y
 CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y
 CONFIG_CFG80211_DEFAULT_PS=y
-# CONFIG_CFG80211_DEBUGFS is not set
+CONFIG_CFG80211_DEBUGFS=y
 CONFIG_CFG80211_CRDA_SUPPORT=y
 CONFIG_CFG80211_WEXT=y
+CONFIG_LIB80211=y
+CONFIG_LIB80211_CRYPT_WEP=y
+CONFIG_LIB80211_CRYPT_CCMP=y
+CONFIG_LIB80211_CRYPT_TKIP=y
+# CONFIG_LIB80211_DEBUG is not set
 CONFIG_MAC80211=y
 CONFIG_MAC80211_HAS_RC=y
 CONFIG_MAC80211_RC_MINSTREL=y
-CONFIG_MAC80211_RC_MINSTREL_HT=y
-# CONFIG_MAC80211_RC_MINSTREL_VHT is not set
 CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
 CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
 # CONFIG_MAC80211_MESH is not set
 CONFIG_MAC80211_LEDS=y
-# CONFIG_MAC80211_DEBUGFS is not set
+CONFIG_MAC80211_DEBUGFS=y
 # CONFIG_MAC80211_MESSAGE_TRACING is not set
-# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_MAC80211_DEBUG_MENU=y
+# CONFIG_MAC80211_NOINLINE is not set
+CONFIG_MAC80211_VERBOSE_DEBUG=y
+# CONFIG_MAC80211_MLME_DEBUG is not set
+# CONFIG_MAC80211_STA_DEBUG is not set
+# CONFIG_MAC80211_HT_DEBUG is not set
+# CONFIG_MAC80211_OCB_DEBUG is not set
+# CONFIG_MAC80211_IBSS_DEBUG is not set
+# CONFIG_MAC80211_PS_DEBUG is not set
+# CONFIG_MAC80211_TDLS_DEBUG is not set
+# CONFIG_MAC80211_DEBUG_COUNTERS is not set
 CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
 # CONFIG_WIMAX is not set
 CONFIG_RFKILL=y
@@ -1105,9 +1306,8 @@ CONFIG_RFKILL_LEDS=y
 # CONFIG_PSAMPLE is not set
 # CONFIG_NET_IFE is not set
 # CONFIG_LWTUNNEL is not set
+CONFIG_DST_CACHE=y
 CONFIG_GRO_CELLS=y
-# CONFIG_NET_DEVLINK is not set
-CONFIG_MAY_USE_DEVLINK=y
 # CONFIG_FAILOVER is not set
 CONFIG_HAVE_EBPF_JIT=y
 
@@ -1115,13 +1315,16 @@ CONFIG_HAVE_EBPF_JIT=y
 # Device Drivers
 #
 CONFIG_ARM_AMBA=y
+CONFIG_HAVE_PCI=y
+# CONFIG_PCI is not set
+# CONFIG_PCCARD is not set
 
 #
 # Generic Driver Options
 #
 # CONFIG_UEVENT_HELPER is not set
 CONFIG_DEVTMPFS=y
-# CONFIG_DEVTMPFS_MOUNT is not set
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 
@@ -1129,16 +1332,17 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # Firmware loader
 #
 CONFIG_FW_LOADER=y
-CONFIG_EXTRA_FIRMWARE="htc_9271.fw htc_7010.fw"
-CONFIG_EXTRA_FIRMWARE_DIR="../open-ath9k-htc-firmware/target_firmware"
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_FW_LOADER_USER_HELPER is not set
+# end of Firmware loader
+
 CONFIG_WANT_DEV_COREDUMP=y
 CONFIG_ALLOW_DEV_COREDUMP=y
 CONFIG_DEV_COREDUMP=y
 # CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
+CONFIG_DEBUG_DEVRES=y
 # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
-# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
+CONFIG_TEST_ASYNC_DRIVER_PROBE=m
 CONFIG_GENERIC_CPU_AUTOPROBE=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
@@ -1147,18 +1351,8 @@ CONFIG_REGMAP_MMIO=y
 CONFIG_REGMAP_IRQ=y
 CONFIG_DMA_SHARED_BUFFER=y
 # CONFIG_DMA_FENCE_TRACE is not set
-CONFIG_DMA_CMA=y
-
-#
-# Default contiguous memory area size:
-#
-CONFIG_CMA_SIZE_MBYTES=16
-CONFIG_CMA_SIZE_SEL_MBYTES=y
-# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
-# CONFIG_CMA_SIZE_SEL_MIN is not set
-# CONFIG_CMA_SIZE_SEL_MAX is not set
-CONFIG_CMA_ALIGNMENT=8
 CONFIG_GENERIC_ARCH_TOPOLOGY=y
+# end of Generic Driver Options
 
 #
 # Bus devices
@@ -1166,65 +1360,139 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y
 # CONFIG_BRCMSTB_GISB_ARB is not set
 # CONFIG_SIMPLE_PM_BUS is not set
 # CONFIG_VEXPRESS_CONFIG is not set
-# CONFIG_CONNECTOR is not set
+# end of Bus devices
+
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
 # CONFIG_GNSS is not set
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# Partition parsers
+#
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# end of Partition parsers
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+CONFIG_MTD_PARTITIONED_MASTER=y
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# end of RAM/ROM/Flash chip drivers
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+# end of Mapping drivers for chip access
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+# CONFIG_MTD_MCHP23K256 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+# end of Self-contained MTD device drivers
+
+# CONFIG_MTD_ONENAND is not set
+# CONFIG_MTD_RAW_NAND is not set
+# CONFIG_MTD_SPI_NAND is not set
+
+#
+# LPDDR & LPDDR2 PCM memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_LPDDR2_NVM is not set
+# end of LPDDR & LPDDR2 PCM memory drivers
+
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+# CONFIG_SPI_CADENCE_QUADSPI is not set
+# CONFIG_SPI_MTK_QUADSPI is not set
+# CONFIG_MTD_UBI is not set
 CONFIG_DTC=y
 CONFIG_OF=y
 # CONFIG_OF_UNITTEST is not set
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_KOBJ=y
-CONFIG_OF_DYNAMIC=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_IRQ=y
 CONFIG_OF_NET=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_RESERVED_MEM=y
-CONFIG_OF_RESOLVE=y
-CONFIG_OF_OVERLAY=y
+# CONFIG_OF_OVERLAY is not set
 CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_NULL_BLK is not set
 CONFIG_CDROM=y
-# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
 CONFIG_ZRAM=y
 # CONFIG_ZRAM_WRITEBACK is not set
 # CONFIG_ZRAM_MEMORY_TRACKING is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 # CONFIG_BLK_DEV_DRBD is not set
 # CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
-# CONFIG_VIRTIO_BLK is not set
 # CONFIG_BLK_DEV_RBD is not set
-# CONFIG_BLK_DEV_RSXX is not set
 
 #
 # NVME Support
 #
-# CONFIG_BLK_DEV_NVME is not set
 # CONFIG_NVME_FC is not set
 # CONFIG_NVME_TARGET is not set
+# end of NVME Support
 
 #
 # Misc devices
 #
 # CONFIG_AD525X_DPOT is not set
 # CONFIG_DUMMY_IRQ is not set
-# CONFIG_PHANTOM is not set
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
-# CONFIG_HP_ILO is not set
 # CONFIG_APDS9802ALS is not set
 # CONFIG_ISL29003 is not set
 # CONFIG_ISL29020 is not set
@@ -1235,10 +1503,8 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
 # CONFIG_DS1682 is not set
 # CONFIG_USB_SWITCH_FSA9480 is not set
 # CONFIG_LATTICE_ECP3_CONFIG is not set
-CONFIG_SRAM=y
-CONFIG_SRAM_EXEC=y
-# CONFIG_PCI_ENDPOINT_TEST is not set
-CONFIG_MISC_RTSX=y
+# CONFIG_SRAM is not set
+# CONFIG_PVPANIC is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -1248,15 +1514,18 @@ CONFIG_MISC_RTSX=y
 # CONFIG_EEPROM_AT25 is not set
 # CONFIG_EEPROM_LEGACY is not set
 # CONFIG_EEPROM_MAX6875 is not set
-CONFIG_EEPROM_93CX6=m
+# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_EEPROM_93XX46 is not set
 # CONFIG_EEPROM_IDT_89HPESX is not set
-# CONFIG_CB710_CORE is not set
+# CONFIG_EEPROM_EE1004 is not set
+# end of EEPROM support
 
 #
 # Texas Instruments shared transport line discipline
 #
 # CONFIG_TI_ST is not set
+# end of Texas Instruments shared transport line discipline
+
 # CONFIG_SENSORS_LIS3_SPI is not set
 # CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_ALTERA_STAPL is not set
@@ -1276,6 +1545,7 @@ CONFIG_EEPROM_93CX6=m
 #
 # VOP Bus Driver
 #
+# CONFIG_VOP_BUS is not set
 
 #
 # Intel MIC Host Driver
@@ -1296,11 +1566,11 @@ CONFIG_EEPROM_93CX6=m
 #
 # VOP Driver
 #
+# end of Intel MIC & related support
+
 # CONFIG_ECHO is not set
-# CONFIG_MISC_RTSX_PCI is not set
-CONFIG_MISC_RTSX_USB=y
-CONFIG_HAVE_IDE=y
-# CONFIG_IDE is not set
+# CONFIG_MISC_RTSX_USB is not set
+# end of Misc devices
 
 #
 # SCSI device support
@@ -1309,7 +1579,6 @@ CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
-# CONFIG_SCSI_MQ_DEFAULT is not set
 CONFIG_SCSI_PROC_FS=y
 
 #
@@ -1324,7 +1593,7 @@ CONFIG_BLK_DEV_SR=y
 # CONFIG_CHR_DEV_SCH is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
-# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_SCAN_ASYNC=y
 
 #
 # SCSI Transports
@@ -1335,84 +1604,68 @@ CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_SAS_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
+# end of SCSI Transports
+
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_ISCSI_BOOT_SYSFS is not set
-# CONFIG_SCSI_CXGB3_ISCSI is not set
-# CONFIG_SCSI_CXGB4_ISCSI is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
-# CONFIG_BE2ISCSI is not set
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_HPSA is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_3W_SAS is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_AIC94XX is not set
-# CONFIG_SCSI_MVSAS is not set
-# CONFIG_SCSI_MVUMI is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_ARCMSR is not set
-# CONFIG_SCSI_ESAS2R is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_MPT3SAS is not set
-# CONFIG_SCSI_MPT2SAS is not set
-# CONFIG_SCSI_SMARTPQI is not set
 # CONFIG_SCSI_UFSHCD is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_SNIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_STEX is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_ISCSI is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_AM53C974 is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_WD719X is not set
 # CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_PMCRAID is not set
-# CONFIG_SCSI_PM8001 is not set
-# CONFIG_SCSI_VIRTIO is not set
 # CONFIG_SCSI_DH is not set
-# CONFIG_SCSI_OSD_INITIATOR is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-# CONFIG_TARGET_CORE is not set
-# CONFIG_FUSION is not set
+# end of SCSI device support
 
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_FIREWIRE is not set
-# CONFIG_FIREWIRE_NOSY is not set
+# CONFIG_ATA is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_BCACHE is not set
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_BUFIO=y
+# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set
+CONFIG_DM_BIO_PRISON=y
+CONFIG_DM_PERSISTENT_DATA=y
+# CONFIG_DM_UNSTRIPED is not set
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_SNAPSHOT is not set
+CONFIG_DM_THIN_PROVISIONING=y
+# CONFIG_DM_CACHE is not set
+# CONFIG_DM_WRITECACHE is not set
+# CONFIG_DM_ERA is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_RAID is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_DUST is not set
+# CONFIG_DM_INIT is not set
+# CONFIG_DM_UEVENT is not set
+CONFIG_DM_FLAKEY=y
+CONFIG_DM_VERITY=y
+# CONFIG_DM_VERITY_FEC is not set
+# CONFIG_DM_SWITCH is not set
+# CONFIG_DM_LOG_WRITES is not set
+# CONFIG_DM_INTEGRITY is not set
+# CONFIG_TARGET_CORE is not set
 CONFIG_NETDEVICES=y
 CONFIG_MII=y
 CONFIG_NET_CORE=y
 # CONFIG_BONDING is not set
 # CONFIG_DUMMY is not set
 # CONFIG_EQUALIZER is not set
-# CONFIG_NET_FC is not set
+# CONFIG_IFB is not set
 # CONFIG_NET_TEAM is not set
 # CONFIG_MACVLAN is not set
 # CONFIG_IPVLAN is not set
 # CONFIG_VXLAN is not set
+# CONFIG_GENEVE is not set
 # CONFIG_GTP is not set
 # CONFIG_MACSEC is not set
 # CONFIG_NETCONSOLE is not set
 CONFIG_TUN=y
 # CONFIG_TUN_VNET_CROSS_LE is not set
-# CONFIG_VETH is not set
-# CONFIG_VIRTIO_NET is not set
+CONFIG_VETH=y
 # CONFIG_NLMON is not set
-# CONFIG_ARCNET is not set
 
 #
 # CAIF transport drivers
@@ -1421,15 +1674,101 @@ CONFIG_TUN=y
 #
 # Distributed Switch Architecture drivers
 #
-# CONFIG_ETHERNET is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
+# end of Distributed Switch Architecture drivers
+
+CONFIG_ETHERNET=y
+CONFIG_NET_VENDOR_ALACRITECH=y
+# CONFIG_ALTERA_TSE is not set
+CONFIG_NET_VENDOR_AMAZON=y
+CONFIG_NET_VENDOR_AQUANTIA=y
+CONFIG_NET_VENDOR_ARC=y
+# CONFIG_EMAC_ROCKCHIP is not set
+CONFIG_NET_VENDOR_AURORA=y
+# CONFIG_AURORA_NB8800 is not set
+CONFIG_NET_VENDOR_BROADCOM=y
+# CONFIG_B44 is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_SYSTEMPORT is not set
+CONFIG_NET_VENDOR_CADENCE=y
+# CONFIG_MACB is not set
+CONFIG_NET_VENDOR_CAVIUM=y
+CONFIG_NET_VENDOR_CIRRUS=y
+# CONFIG_CS89x0 is not set
+CONFIG_NET_VENDOR_CORTINA=y
+# CONFIG_GEMINI_ETHERNET is not set
+# CONFIG_DM9000 is not set
+# CONFIG_DNET is not set
+CONFIG_NET_VENDOR_EZCHIP=y
+# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
+CONFIG_NET_VENDOR_FARADAY=y
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+CONFIG_NET_VENDOR_HISILICON=y
+# CONFIG_HIX5HD2_GMAC is not set
+# CONFIG_HISI_FEMAC is not set
+# CONFIG_HIP04_ETH is not set
+# CONFIG_HNS is not set
+# CONFIG_HNS_DSAF is not set
+# CONFIG_HNS_ENET is not set
+CONFIG_NET_VENDOR_HUAWEI=y
+CONFIG_NET_VENDOR_I825XX=y
+CONFIG_NET_VENDOR_INTEL=y
+CONFIG_NET_VENDOR_MARVELL=y
+# CONFIG_MVMDIO is not set
+CONFIG_NET_VENDOR_MELLANOX=y
+# CONFIG_MLXSW_CORE is not set
+# CONFIG_MLXFW is not set
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NET_VENDOR_MICROCHIP=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+CONFIG_NET_VENDOR_MICROSEMI=y
+CONFIG_NET_VENDOR_NATSEMI=y
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NET_VENDOR_NI=y
+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
+CONFIG_NET_VENDOR_8390=y
+# CONFIG_AX88796 is not set
+# CONFIG_ETHOC is not set
+CONFIG_NET_VENDOR_QUALCOMM=y
+# CONFIG_QCA7000_SPI is not set
+# CONFIG_QCOM_EMAC is not set
+# CONFIG_RMNET is not set
+CONFIG_NET_VENDOR_RENESAS=y
+CONFIG_NET_VENDOR_ROCKER=y
+CONFIG_NET_VENDOR_SAMSUNG=y
+# CONFIG_SXGBE_ETH is not set
+CONFIG_NET_VENDOR_SEEQ=y
+CONFIG_NET_VENDOR_SOLARFLARE=y
+CONFIG_NET_VENDOR_SMSC=y
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+CONFIG_NET_VENDOR_SOCIONEXT=y
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+# CONFIG_DWMAC_DWC_QOS_ETH is not set
+CONFIG_DWMAC_GENERIC=y
+CONFIG_DWMAC_ROCKCHIP=y
+CONFIG_NET_VENDOR_SYNOPSYS=y
+# CONFIG_DWC_XLGMAC is not set
+CONFIG_NET_VENDOR_VIA=y
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_VELOCITY is not set
+CONFIG_NET_VENDOR_WIZNET=y
+# CONFIG_WIZNET_W5100 is not set
+# CONFIG_WIZNET_W5300 is not set
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_BUS=y
 # CONFIG_MDIO_BCM_UNIMAC is not set
 # CONFIG_MDIO_BITBANG is not set
 # CONFIG_MDIO_BUS_MUX_GPIO is not set
 # CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
 # CONFIG_MDIO_HISI_FEMAC is not set
 # CONFIG_MDIO_MSCC_MIIM is not set
 CONFIG_PHYLIB=y
@@ -1461,12 +1800,12 @@ CONFIG_FIXED_PHY=y
 # CONFIG_MARVELL_PHY is not set
 # CONFIG_MARVELL_10G_PHY is not set
 # CONFIG_MICREL_PHY is not set
-CONFIG_MICROCHIP_PHY=y
+# CONFIG_MICROCHIP_PHY is not set
 # CONFIG_MICROCHIP_T1_PHY is not set
 # CONFIG_MICROSEMI_PHY is not set
 # CONFIG_NATIONAL_PHY is not set
 # CONFIG_QSEMI_PHY is not set
-# CONFIG_REALTEK_PHY is not set
+CONFIG_REALTEK_PHY=y
 # CONFIG_RENESAS_PHY is not set
 # CONFIG_ROCKCHIP_PHY is not set
 # CONFIG_SMSC_PHY is not set
@@ -1475,98 +1814,151 @@ CONFIG_MICROCHIP_PHY=y
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_XILINX_GMII2RGMII is not set
 # CONFIG_MICREL_KS8995MA is not set
-# CONFIG_PPP is not set
+CONFIG_PPP=y
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_DEFLATE is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_MPPE=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPPOE is not set
+CONFIG_PPP_ASYNC=y
+# CONFIG_PPP_SYNC_TTY is not set
 # CONFIG_SLIP is not set
+CONFIG_SLHC=y
 CONFIG_USB_NET_DRIVERS=y
 # CONFIG_USB_CATC is not set
 # CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
+CONFIG_USB_PEGASUS=y
 CONFIG_USB_RTL8150=y
 CONFIG_USB_RTL8152=y
-CONFIG_USB_LAN78XX=y
+# CONFIG_USB_LAN78XX is not set
 CONFIG_USB_USBNET=y
 CONFIG_USB_NET_AX8817X=y
 CONFIG_USB_NET_AX88179_178A=y
 CONFIG_USB_NET_CDCETHER=y
-CONFIG_USB_NET_CDC_EEM=y
-# CONFIG_USB_NET_CDC_NCM is not set
+# CONFIG_USB_NET_CDC_EEM is not set
+CONFIG_USB_NET_CDC_NCM=y
 # CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
 # CONFIG_USB_NET_CDC_MBIM is not set
-# CONFIG_USB_NET_DM9601 is not set
+CONFIG_USB_NET_DM9601=y
 # CONFIG_USB_NET_SR9700 is not set
 # CONFIG_USB_NET_SR9800 is not set
 CONFIG_USB_NET_SMSC75XX=y
 CONFIG_USB_NET_SMSC95XX=y
 # CONFIG_USB_NET_GL620A is not set
-# CONFIG_USB_NET_NET1080 is not set
+CONFIG_USB_NET_NET1080=y
 # CONFIG_USB_NET_PLUSB is not set
-# CONFIG_USB_NET_MCS7830 is not set
+CONFIG_USB_NET_MCS7830=y
 CONFIG_USB_NET_RNDIS_HOST=y
-CONFIG_USB_NET_CDC_SUBSET_ENABLE=y
-CONFIG_USB_NET_CDC_SUBSET=y
-# CONFIG_USB_ALI_M5632 is not set
-# CONFIG_USB_AN2720 is not set
-# CONFIG_USB_BELKIN is not set
-CONFIG_USB_ARMLINUX=y
-# CONFIG_USB_EPSON2888 is not set
-# CONFIG_USB_KC2190 is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
 # CONFIG_USB_NET_ZAURUS is not set
 # CONFIG_USB_NET_CX82310_ETH is not set
 # CONFIG_USB_NET_KALMIA is not set
 # CONFIG_USB_NET_QMI_WWAN is not set
 # CONFIG_USB_HSO is not set
 # CONFIG_USB_NET_INT51X1 is not set
-# CONFIG_USB_IPHETH is not set
+CONFIG_USB_IPHETH=y
 # CONFIG_USB_SIERRA_NET is not set
 # CONFIG_USB_VL600 is not set
 # CONFIG_USB_NET_CH9200 is not set
+# CONFIG_USB_NET_AQC111 is not set
 CONFIG_WLAN=y
 # CONFIG_WIRELESS_WDS is not set
-# CONFIG_WLAN_VENDOR_ADMTEK is not set
+CONFIG_WLAN_VENDOR_ADMTEK=y
 CONFIG_ATH_COMMON=y
 CONFIG_WLAN_VENDOR_ATH=y
-CONFIG_ATH_DEBUG=y
-# CONFIG_ATH_TRACEPOINTS is not set
-# CONFIG_ATH5K is not set
-# CONFIG_ATH5K_PCI is not set
+# CONFIG_ATH_DEBUG is not set
 CONFIG_ATH9K_HW=y
 CONFIG_ATH9K_COMMON=y
-CONFIG_ATH9K_COMMON_DEBUG=y
 CONFIG_ATH9K_BTCOEX_SUPPORT=y
-# CONFIG_ATH9K is not set
+CONFIG_ATH9K=y
+# CONFIG_ATH9K_AHB is not set
+# CONFIG_ATH9K_DEBUGFS is not set
+# CONFIG_ATH9K_DYNACK is not set
+# CONFIG_ATH9K_WOW is not set
+CONFIG_ATH9K_RFKILL=y
+# CONFIG_ATH9K_CHANNEL_CONTEXT is not set
+CONFIG_ATH9K_PCOEM=y
 CONFIG_ATH9K_HTC=y
-CONFIG_ATH9K_HTC_DEBUGFS=y
-# CONFIG_ATH9K_COMMON_SPECTRAL is not set
+# CONFIG_ATH9K_HTC_DEBUGFS is not set
+# CONFIG_ATH9K_HWRNG is not set
 CONFIG_CARL9170=y
 CONFIG_CARL9170_LEDS=y
+# CONFIG_CARL9170_DEBUGFS is not set
 CONFIG_CARL9170_WPC=y
+# CONFIG_CARL9170_HWRNG is not set
 # CONFIG_ATH6KL is not set
 # CONFIG_AR5523 is not set
-# CONFIG_WIL6210 is not set
 # CONFIG_ATH10K is not set
 # CONFIG_WCN36XX is not set
-# CONFIG_WLAN_VENDOR_ATMEL is not set
+CONFIG_WLAN_VENDOR_ATMEL=y
+# CONFIG_AT76C50X_USB is not set
 # CONFIG_WLAN_VENDOR_BROADCOM is not set
-# CONFIG_WLAN_VENDOR_CISCO is not set
-# CONFIG_WLAN_VENDOR_INTEL is not set
-# CONFIG_WLAN_VENDOR_INTERSIL is not set
-# CONFIG_WLAN_VENDOR_MARVELL is not set
-# CONFIG_WLAN_VENDOR_MEDIATEK is not set
-# CONFIG_WLAN_VENDOR_RALINK is not set
-# CONFIG_WLAN_VENDOR_REALTEK is not set
-# CONFIG_WLAN_VENDOR_RSI is not set
-# CONFIG_WLAN_VENDOR_ST is not set
-# CONFIG_WLAN_VENDOR_TI is not set
-# CONFIG_WLAN_VENDOR_ZYDAS is not set
-# CONFIG_WLAN_VENDOR_QUANTENNA is not set
-# CONFIG_MAC80211_HWSIM is not set
-# CONFIG_USB_NET_RNDIS_WLAN is not set
+CONFIG_WLAN_VENDOR_CISCO=y
+CONFIG_WLAN_VENDOR_INTEL=y
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_HOSTAP=y
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+# CONFIG_P54_COMMON is not set
+CONFIG_WLAN_VENDOR_MARVELL=y
+# CONFIG_LIBERTAS is not set
+CONFIG_LIBERTAS_THINFIRM=y
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+# CONFIG_LIBERTAS_THINFIRM_USB is not set
+CONFIG_MWIFIEX=y
+CONFIG_MWIFIEX_SDIO=y
+# CONFIG_MWIFIEX_USB is not set
+CONFIG_WLAN_VENDOR_MEDIATEK=y
+# CONFIG_MT7601U is not set
+# CONFIG_MT76x0U is not set
+# CONFIG_MT76x2U is not set
+CONFIG_WLAN_VENDOR_RALINK=y
+CONFIG_RT2X00=y
+# CONFIG_RT2500USB is not set
+# CONFIG_RT73USB is not set
+CONFIG_RT2800USB=y
+CONFIG_RT2800USB_RT33XX=y
+CONFIG_RT2800USB_RT35XX=y
+CONFIG_RT2800USB_RT3573=y
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RT2800_LIB=y
+CONFIG_RT2X00_LIB_USB=y
+CONFIG_RT2X00_LIB=y
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
+# CONFIG_RT2X00_LIB_DEBUGFS is not set
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_WLAN_VENDOR_REALTEK=y
+# CONFIG_RTL8187 is not set
+CONFIG_RTL_CARDS=y
+# CONFIG_RTL8192CU is not set
+# CONFIG_RTL8XXXU is not set
+# CONFIG_RTW88 is not set
+CONFIG_WLAN_VENDOR_RSI=y
+# CONFIG_RSI_91X is not set
+CONFIG_WLAN_VENDOR_ST=y
+# CONFIG_CW1200 is not set
+CONFIG_WLAN_VENDOR_TI=y
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX is not set
+# CONFIG_WL18XX is not set
+# CONFIG_WLCORE is not set
+CONFIG_WLAN_VENDOR_ZYDAS=y
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_ZD1211RW is not set
+CONFIG_WLAN_VENDOR_QUANTENNA=y
+CONFIG_MAC80211_HWSIM=y
+CONFIG_USB_NET_RNDIS_WLAN=y
+# CONFIG_VIRT_WIFI is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
 #
 # CONFIG_WAN is not set
-# CONFIG_VMXNET3 is not set
 # CONFIG_NETDEVSIM is not set
 # CONFIG_NET_FAILOVER is not set
 # CONFIG_ISDN is not set
@@ -1577,8 +1969,8 @@ CONFIG_CARL9170_WPC=y
 #
 CONFIG_INPUT=y
 CONFIG_INPUT_LEDS=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-# CONFIG_INPUT_POLLDEV is not set
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_POLLDEV=y
 # CONFIG_INPUT_SPARSEKMAP is not set
 CONFIG_INPUT_MATRIXKMAP=y
 
@@ -1586,7 +1978,7 @@ CONFIG_INPUT_MATRIXKMAP=y
 # Userland interfaces
 #
 # CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_JOYDEV=y
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
 
@@ -1598,12 +1990,13 @@ CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ADP5589 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_QT1050 is not set
 # CONFIG_KEYBOARD_QT1070 is not set
 # CONFIG_KEYBOARD_QT2160 is not set
 # CONFIG_KEYBOARD_DLINK_DIR685 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
 CONFIG_KEYBOARD_GPIO=y
-# CONFIG_KEYBOARD_GPIO_POLLED is not set
+CONFIG_KEYBOARD_GPIO_POLLED=y
 # CONFIG_KEYBOARD_TCA6416 is not set
 # CONFIG_KEYBOARD_TCA8418 is not set
 # CONFIG_KEYBOARD_MATRIX is not set
@@ -1619,7 +2012,6 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_OMAP4 is not set
 # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
-# CONFIG_KEYBOARD_TWL4030 is not set
 # CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_KEYBOARD_CROS_EC=y
 # CONFIG_KEYBOARD_CAP11XX is not set
@@ -1629,7 +2021,7 @@ CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
 # CONFIG_MOUSE_BCM5974 is not set
-# CONFIG_MOUSE_CYAPA is not set
+CONFIG_MOUSE_CYAPA=y
 CONFIG_MOUSE_ELAN_I2C=y
 CONFIG_MOUSE_ELAN_I2C_I2C=y
 # CONFIG_MOUSE_ELAN_I2C_SMBUS is not set
@@ -1637,17 +2029,189 @@ CONFIG_MOUSE_ELAN_I2C_I2C=y
 # CONFIG_MOUSE_GPIO is not set
 # CONFIG_MOUSE_SYNAPTICS_I2C is not set
 # CONFIG_MOUSE_SYNAPTICS_USB is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-# CONFIG_RMI4_CORE is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+CONFIG_JOYSTICK_IFORCE=y
+CONFIG_JOYSTICK_IFORCE_USB=y
+# CONFIG_JOYSTICK_IFORCE_232 is not set
+# CONFIG_JOYSTICK_WARRIOR is not set
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_AS5011 is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+# CONFIG_JOYSTICK_PSXPAD_SPI is not set
+# CONFIG_JOYSTICK_PXRC is not set
+CONFIG_INPUT_TABLET=y
+# CONFIG_TABLET_USB_ACECAD is not set
+# CONFIG_TABLET_USB_AIPTEK is not set
+# CONFIG_TABLET_USB_GTCO is not set
+# CONFIG_TABLET_USB_HANWANG is not set
+# CONFIG_TABLET_USB_KBTAB is not set
+# CONFIG_TABLET_USB_PEGASUS is not set
+# CONFIG_TABLET_SERIAL_WACOM4 is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_PROPERTIES=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ADC is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_BU21029 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_EGALAX is not set
+# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
+# CONFIG_TOUCHSCREEN_EXC3000 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+# CONFIG_TOUCHSCREEN_HIDEEP is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_S6SY761 is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
+CONFIG_TOUCHSCREEN_ELAN=y
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_ELO=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y
+CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y
+CONFIG_TOUCHSCREEN_USB_NEXIO=y
+CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_TSC2004 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_RM_TS is not set
+# CONFIG_TOUCHSCREEN_SILEAD is not set
+# CONFIG_TOUCHSCREEN_SIS_I2C is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_STMFTS is not set
+# CONFIG_TOUCHSCREEN_SUR40 is not set
+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_ZET6223 is not set
+# CONFIG_TOUCHSCREEN_ZFORCE is not set
+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
+# CONFIG_TOUCHSCREEN_IQS5XX is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_E3X0_BUTTON is not set
+# CONFIG_INPUT_MSM_VIBRATOR is not set
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_BEEPER is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
+# CONFIG_INPUT_GPIO_VIBRA is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_PWM_VIBRA is not set
+# CONFIG_INPUT_RK805_PWRKEY is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_IMS_PCU is not set
+# CONFIG_INPUT_CMA3000 is not set
+# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
+# CONFIG_INPUT_DRV260X_HAPTICS is not set
+# CONFIG_INPUT_DRV2665_HAPTICS is not set
+# CONFIG_INPUT_DRV2667_HAPTICS is not set
+CONFIG_RMI4_CORE=y
+# CONFIG_RMI4_I2C is not set
+# CONFIG_RMI4_SPI is not set
+# CONFIG_RMI4_SMB is not set
+CONFIG_RMI4_F03=y
+CONFIG_RMI4_F03_SERIO=y
+CONFIG_RMI4_2D_SENSOR=y
+CONFIG_RMI4_F11=y
+CONFIG_RMI4_F12=y
+CONFIG_RMI4_F30=y
+# CONFIG_RMI4_F34 is not set
+# CONFIG_RMI4_F54 is not set
+# CONFIG_RMI4_F55 is not set
 
 #
 # Hardware I/O ports
 #
-# CONFIG_SERIO is not set
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_AMBAKMI is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_SERIO_GPIO_PS2 is not set
+# CONFIG_USERIO is not set
 # CONFIG_GAMEPORT is not set
+# end of Hardware I/O ports
+# end of Input device support
 
 #
 # Character devices
@@ -1656,14 +2220,15 @@ CONFIG_TTY=y
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
 CONFIG_HW_CONSOLE=y
 CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_NOZOMI is not set
 # CONFIG_N_GSM is not set
 # CONFIG_TRACE_SINK is not set
+# CONFIG_NULL_TTY is not set
 CONFIG_LDISC_AUTOLOAD=y
 CONFIG_DEVMEM=y
 # CONFIG_DEVKMEM is not set
@@ -1677,8 +2242,6 @@ CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
 # CONFIG_SERIAL_8250_FINTEK is not set
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DMA=y
-CONFIG_SERIAL_8250_PCI=y
-CONFIG_SERIAL_8250_EXAR=y
 CONFIG_SERIAL_8250_NR_UARTS=4
 CONFIG_SERIAL_8250_RUNTIME_UARTS=4
 # CONFIG_SERIAL_8250_EXTENDED is not set
@@ -1687,7 +2250,6 @@ CONFIG_SERIAL_8250_FSL=y
 CONFIG_SERIAL_8250_DW=y
 # CONFIG_SERIAL_8250_EM is not set
 # CONFIG_SERIAL_8250_RT288X is not set
-# CONFIG_SERIAL_8250_MOXA is not set
 CONFIG_SERIAL_OF_PLATFORM=y
 
 #
@@ -1703,7 +2265,7 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 # CONFIG_SERIAL_UARTLITE is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_SIFIVE is not set
 # CONFIG_SERIAL_SCCNXP is not set
 # CONFIG_SERIAL_SC16IS7XX is not set
 # CONFIG_SERIAL_BCM63XX is not set
@@ -1714,19 +2276,20 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_ARC=y
 CONFIG_SERIAL_ARC_CONSOLE=y
 CONFIG_SERIAL_ARC_NR_PORTS=1
-# CONFIG_SERIAL_RP2 is not set
 # CONFIG_SERIAL_FSL_LPUART is not set
 # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
 # CONFIG_SERIAL_ST_ASC is not set
+# end of Serial drivers
+
 # CONFIG_SERIAL_DEV_BUS is not set
 # CONFIG_TTY_PRINTK is not set
 # CONFIG_HVC_DCC is not set
-# CONFIG_VIRTIO_CONSOLE is not set
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_APPLICOM is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_RAW_DRIVER is not set
 CONFIG_TCG_TPM=y
+CONFIG_HW_RANDOM_TPM=y
 # CONFIG_TCG_TIS is not set
 # CONFIG_TCG_TIS_SPI is not set
 # CONFIG_TCG_TIS_I2C_ATMEL is not set
@@ -1736,15 +2299,15 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
 # CONFIG_TCG_VTPM_PROXY is not set
 # CONFIG_TCG_TIS_ST33ZP24_I2C is not set
 # CONFIG_TCG_TIS_ST33ZP24_SPI is not set
-CONFIG_DEVPORT=y
 # CONFIG_XILLYBUS is not set
+# end of Character devices
 
 #
 # I2C support
 #
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
-# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y
 
@@ -1761,6 +2324,8 @@ CONFIG_I2C_MUX=y
 # CONFIG_I2C_MUX_REG is not set
 # CONFIG_I2C_DEMUX_PINCTRL is not set
 # CONFIG_I2C_MUX_MLXCPLD is not set
+# end of Multiplexer I2C Chip support
+
 CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_ALGOBIT=y
 
@@ -1768,33 +2333,13 @@ CONFIG_I2C_ALGOBIT=y
 # I2C Hardware Bus support
 #
 
-#
-# PC SMBus host controller drivers
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_ISCH is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
 # CONFIG_I2C_CBUS_GPIO is not set
 # CONFIG_I2C_DESIGNWARE_PLATFORM is not set
-# CONFIG_I2C_DESIGNWARE_PCI is not set
 # CONFIG_I2C_EMEV2 is not set
-CONFIG_I2C_GPIO=y
-# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
+# CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_NOMADIK is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_PCA_PLATFORM is not set
@@ -1815,15 +2360,20 @@ CONFIG_I2C_RK3X=y
 # Other I2C/SMBus bus drivers
 #
 CONFIG_I2C_CROS_EC_TUNNEL=y
-# CONFIG_I2C_STUB is not set
+# end of I2C Hardware Bus support
+
+CONFIG_I2C_STUB=m
 # CONFIG_I2C_SLAVE is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
+# end of I2C support
+
+# CONFIG_I3C is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
-# CONFIG_SPI_MEM is not set
+CONFIG_SPI_MEM=y
 
 #
 # SPI Master Controller Drivers
@@ -1833,13 +2383,15 @@ CONFIG_SPI_MASTER=y
 CONFIG_SPI_BITBANG=y
 # CONFIG_SPI_CADENCE is not set
 # CONFIG_SPI_DESIGNWARE is not set
-CONFIG_SPI_GPIO=y
+# CONFIG_SPI_NXP_FLEXSPI is not set
+# CONFIG_SPI_GPIO is not set
 # CONFIG_SPI_FSL_SPI is not set
 # CONFIG_SPI_OC_TINY is not set
 # CONFIG_SPI_PL022 is not set
-# CONFIG_SPI_PXA2XX is not set
 CONFIG_SPI_ROCKCHIP=y
 # CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SPI_MXIC is not set
 # CONFIG_SPI_XCOMM is not set
 # CONFIG_SPI_XILINX is not set
 # CONFIG_SPI_ZYNQMP_GQSPI is not set
@@ -1847,7 +2399,7 @@ CONFIG_SPI_ROCKCHIP=y
 #
 # SPI Protocol Masters
 #
-# CONFIG_SPI_SPIDEV is not set
+CONFIG_SPI_SPIDEV=y
 # CONFIG_SPI_LOOPBACK_TEST is not set
 # CONFIG_SPI_TLE62X0 is not set
 # CONFIG_SPI_SLAVE is not set
@@ -1875,77 +2427,68 @@ CONFIG_PTP_1588_CLOCK=y
 #
 # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
 #
+# end of PTP clock support
+
 CONFIG_PINCTRL=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
 CONFIG_PINMUX=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
 CONFIG_PINCONF=y
 CONFIG_GENERIC_PINCONF=y
 # CONFIG_DEBUG_PINCTRL is not set
-CONFIG_PINCTRL_AS3722=y
-# CONFIG_PINCTRL_AXP209 is not set
 # CONFIG_PINCTRL_AMD is not set
 # CONFIG_PINCTRL_MCP23S08 is not set
 CONFIG_PINCTRL_ROCKCHIP=y
-CONFIG_PINCTRL_SINGLE=y
+# CONFIG_PINCTRL_SINGLE is not set
 # CONFIG_PINCTRL_SX150X is not set
-CONFIG_PINCTRL_PALMAS=y
+# CONFIG_PINCTRL_STMFX is not set
 # CONFIG_PINCTRL_RK805 is not set
+# CONFIG_PINCTRL_OCELOT is not set
 CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIOLIB_FASTPATH_LIMIT=512
 CONFIG_OF_GPIO=y
-CONFIG_GPIOLIB_IRQCHIP=y
-# CONFIG_DEBUG_GPIO is not set
+CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_GENERIC=y
 
 #
 # Memory mapped GPIO drivers
 #
 # CONFIG_GPIO_74XX_MMIO is not set
 # CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_CADENCE is not set
 # CONFIG_GPIO_DWAPB is not set
-# CONFIG_GPIO_EXAR is not set
 # CONFIG_GPIO_FTGPIO010 is not set
-CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
 # CONFIG_GPIO_GRGPIO is not set
 # CONFIG_GPIO_HLWD is not set
 # CONFIG_GPIO_MB86S7X is not set
-# CONFIG_GPIO_MOCKUP is not set
 # CONFIG_GPIO_MPC8XXX is not set
-CONFIG_GPIO_PL061=y
+# CONFIG_GPIO_PL061 is not set
+# CONFIG_GPIO_SAMA5D2_PIOBU is not set
 # CONFIG_GPIO_SYSCON is not set
 # CONFIG_GPIO_XILINX is not set
 # CONFIG_GPIO_ZEVIO is not set
+# CONFIG_GPIO_AMD_FCH is not set
+# end of Memory mapped GPIO drivers
 
 #
 # I2C GPIO expanders
 #
 # CONFIG_GPIO_ADP5588 is not set
 # CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_GW_PLD is not set
 # CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
 # CONFIG_GPIO_TPIC2810 is not set
+# end of I2C GPIO expanders
 
 #
 # MFD GPIO expanders
 #
-# CONFIG_GPIO_DA9052 is not set
 # CONFIG_HTC_EGPIO is not set
-CONFIG_GPIO_PALMAS=y
-CONFIG_GPIO_TWL4030=y
-CONFIG_GPIO_TWL6040=y
-
-#
-# PCI GPIO expanders
-#
-# CONFIG_GPIO_BT8XX is not set
-# CONFIG_GPIO_PCI_IDIO_16 is not set
-# CONFIG_GPIO_PCIE_IDIO_24 is not set
-# CONFIG_GPIO_RDC321X is not set
+# CONFIG_GPIO_TPS6586X is not set
+# end of MFD GPIO expanders
 
 #
 # SPI GPIO expanders
@@ -1956,26 +2499,28 @@ CONFIG_GPIO_TWL6040=y
 # CONFIG_GPIO_MC33880 is not set
 # CONFIG_GPIO_PISOSR is not set
 # CONFIG_GPIO_XRA1403 is not set
+# end of SPI GPIO expanders
 
 #
 # USB GPIO expanders
 #
+# end of USB GPIO expanders
+
+# CONFIG_GPIO_MOCKUP is not set
 # CONFIG_W1 is not set
 CONFIG_POWER_AVS=y
 CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_AS3722=y
 # CONFIG_POWER_RESET_BRCMKONA is not set
 # CONFIG_POWER_RESET_BRCMSTB is not set
-CONFIG_POWER_RESET_GPIO=y
+# CONFIG_POWER_RESET_GPIO is not set
 CONFIG_POWER_RESET_GPIO_RESTART=y
 # CONFIG_POWER_RESET_LTC2952 is not set
-CONFIG_POWER_RESET_RESTART=y
+# CONFIG_POWER_RESET_RESTART is not set
 # CONFIG_POWER_RESET_VERSATILE is not set
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-CONFIG_REBOOT_MODE=y
-CONFIG_SYSCON_REBOOT_MODE=y
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_SYSCON_REBOOT_MODE is not set
 CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 # CONFIG_PDA_POWER is not set
@@ -1989,53 +2534,181 @@ CONFIG_POWER_SUPPLY=y
 CONFIG_BATTERY_SBS=y
 # CONFIG_CHARGER_SBS is not set
 # CONFIG_MANAGER_SBS is not set
-# CONFIG_BATTERY_BQ27XXX is not set
-# CONFIG_BATTERY_DA9052 is not set
-# CONFIG_AXP20X_POWER is not set
-# CONFIG_AXP288_FUEL_GAUGE is not set
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_BATTERY_BQ27XXX_I2C=y
+# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set
 # CONFIG_BATTERY_MAX17040 is not set
 # CONFIG_BATTERY_MAX17042 is not set
-# CONFIG_CHARGER_ISP1704 is not set
 # CONFIG_CHARGER_MAX8903 is not set
-# CONFIG_CHARGER_TWL4030 is not set
 # CONFIG_CHARGER_LP8727 is not set
 CONFIG_CHARGER_GPIO=y
 # CONFIG_CHARGER_MANAGER is not set
-# CONFIG_CHARGER_LTC3651 is not set
+# CONFIG_CHARGER_LT3651 is not set
 # CONFIG_CHARGER_DETECTOR_MAX14656 is not set
 # CONFIG_CHARGER_BQ2415X is not set
-# CONFIG_CHARGER_BQ24190 is not set
 # CONFIG_CHARGER_BQ24257 is not set
-# CONFIG_CHARGER_BQ24735 is not set
+CONFIG_CHARGER_BQ24735=y
 # CONFIG_CHARGER_BQ25890 is not set
 # CONFIG_CHARGER_SMB347 is not set
 # CONFIG_BATTERY_GAUGE_LTC2941 is not set
 # CONFIG_CHARGER_RT9455 is not set
 # CONFIG_CHARGER_CROS_USBPD is not set
-# CONFIG_HWMON is not set
+# CONFIG_CHARGER_UCS1002 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ASPEED is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FTSTEUTATES is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_IIO_HWMON is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_POWR1220 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LTC2945 is not set
+# CONFIG_SENSORS_LTC2990 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4222 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4260 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX31722 is not set
+# CONFIG_SENSORS_MAX6621 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MAX31790 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_TC654 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_NCT6683 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+# CONFIG_SENSORS_NPCM7XX is not set
+# CONFIG_SENSORS_OCC_P8_I2C is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_PWM_FAN is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SHT3x is not set
+# CONFIG_SENSORS_SHTC1 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_STTS751 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_ADC128D818 is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_INA3221 is not set
+# CONFIG_SENSORS_TC74 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP103 is not set
+# CONFIG_SENSORS_TMP108 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83773G is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
 CONFIG_THERMAL=y
 # CONFIG_THERMAL_STATISTICS is not set
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 # CONFIG_THERMAL_WRITABLE_TRIPS is not set
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
 # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
 # CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
-CONFIG_THERMAL_GOV_FAIR_SHARE=y
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
 CONFIG_THERMAL_GOV_STEP_WISE=y
 # CONFIG_THERMAL_GOV_BANG_BANG is not set
-# CONFIG_THERMAL_GOV_USER_SPACE is not set
+CONFIG_THERMAL_GOV_USER_SPACE=y
 # CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
 CONFIG_CPU_THERMAL=y
 # CONFIG_CLOCK_THERMAL is not set
+CONFIG_DEVFREQ_THERMAL=y
 # CONFIG_THERMAL_EMULATION is not set
+# CONFIG_THERMAL_MMIO is not set
 # CONFIG_QORIQ_THERMAL is not set
 CONFIG_ROCKCHIP_THERMAL=y
-
-#
-# ACPI INT340X thermal drivers
-#
 # CONFIG_GENERIC_ADC_THERMAL is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_CORE=y
@@ -2043,11 +2716,15 @@ CONFIG_WATCHDOG_CORE=y
 CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
 # CONFIG_WATCHDOG_SYSFS is not set
 
+#
+# Watchdog Pretimeout Governors
+#
+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
+
 #
 # Watchdog Device Drivers
 #
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_DA9052_WATCHDOG is not set
+CONFIG_SOFT_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG is not set
 # CONFIG_XILINX_WATCHDOG is not set
 # CONFIG_ZIIRAVE_WATCHDOG is not set
@@ -2055,31 +2732,22 @@ CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
 # CONFIG_CADENCE_WATCHDOG is not set
 # CONFIG_FTWDT010_WATCHDOG is not set
 CONFIG_DW_WATCHDOG=y
-# CONFIG_TWL4030_WATCHDOG is not set
 # CONFIG_MAX63XX_WATCHDOG is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_I6300ESB_WDT is not set
+# CONFIG_IMX_SC_WDT is not set
 # CONFIG_MEN_A21_WDT is not set
 
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-
 #
 # USB-based Watchdog Cards
 #
 # CONFIG_USBPCWATCHDOG is not set
-
-#
-# Watchdog Pretimeout Governors
-#
-# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
 CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 CONFIG_BCMA_POSSIBLE=y
-# CONFIG_BCMA is not set
+CONFIG_BCMA=y
+# CONFIG_BCMA_HOST_SOC is not set
+# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
+# CONFIG_BCMA_DRIVER_GPIO is not set
+# CONFIG_BCMA_DEBUG is not set
 
 #
 # Multifunction device drivers
@@ -2087,23 +2755,21 @@ CONFIG_BCMA_POSSIBLE=y
 CONFIG_MFD_CORE=y
 # CONFIG_MFD_ACT8945A is not set
 # CONFIG_MFD_AS3711 is not set
-CONFIG_MFD_AS3722=y
+# CONFIG_MFD_AS3722 is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_AAT2870_CORE is not set
 # CONFIG_MFD_ATMEL_FLEXCOM is not set
 # CONFIG_MFD_ATMEL_HLCDC is not set
 # CONFIG_MFD_BCM590XX is not set
 # CONFIG_MFD_BD9571MWV is not set
-CONFIG_MFD_AXP20X=y
-CONFIG_MFD_AXP20X_I2C=y
+# CONFIG_MFD_AXP20X_I2C is not set
 CONFIG_MFD_CROS_EC=y
 CONFIG_MFD_CROS_EC_CHARDEV=y
 # CONFIG_MFD_MADERA is not set
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_PMIC_DA903X is not set
-CONFIG_PMIC_DA9052=y
-CONFIG_MFD_DA9052_SPI=y
-CONFIG_MFD_DA9052_I2C=y
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
 # CONFIG_MFD_DA9055 is not set
 # CONFIG_MFD_DA9062 is not set
 # CONFIG_MFD_DA9063 is not set
@@ -2114,16 +2780,14 @@ CONFIG_MFD_DA9052_I2C=y
 # CONFIG_MFD_HI6421_PMIC is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_HTC_I2CPLD is not set
-# CONFIG_LPC_ICH is not set
-# CONFIG_LPC_SCH is not set
-# CONFIG_MFD_JANZ_CMODIO is not set
 # CONFIG_MFD_KEMPLD is not set
 # CONFIG_MFD_88PM800 is not set
 # CONFIG_MFD_88PM805 is not set
 # CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_MAX14577 is not set
 # CONFIG_MFD_MAX77620 is not set
-CONFIG_MFD_MAX77686=y
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_MAX77686 is not set
 # CONFIG_MFD_MAX77693 is not set
 # CONFIG_MFD_MAX77843 is not set
 # CONFIG_MFD_MAX8907 is not set
@@ -2138,12 +2802,11 @@ CONFIG_MFD_MAX77686=y
 # CONFIG_MFD_RETU is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_PM8XXX is not set
-# CONFIG_MFD_RDC321X is not set
 # CONFIG_MFD_RT5033 is not set
 # CONFIG_MFD_RC5T583 is not set
 CONFIG_MFD_RK808=y
 # CONFIG_MFD_RN5T618 is not set
-CONFIG_MFD_SEC_CORE=y
+# CONFIG_MFD_SEC_CORE is not set
 # CONFIG_MFD_SI476X_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_SKY81452 is not set
@@ -2155,7 +2818,7 @@ CONFIG_MFD_SYSCON=y
 # CONFIG_MFD_LP3943 is not set
 # CONFIG_MFD_LP8788 is not set
 # CONFIG_MFD_TI_LMU is not set
-CONFIG_MFD_PALMAS=y
+# CONFIG_MFD_PALMAS is not set
 # CONFIG_TPS6105X is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TPS6507X is not set
@@ -2165,22 +2828,21 @@ CONFIG_MFD_PALMAS=y
 # CONFIG_MFD_TI_LP873X is not set
 # CONFIG_MFD_TI_LP87565 is not set
 # CONFIG_MFD_TPS65218 is not set
-# CONFIG_MFD_TPS6586X is not set
+CONFIG_MFD_TPS6586X=y
 # CONFIG_MFD_TPS65910 is not set
 # CONFIG_MFD_TPS65912_I2C is not set
 # CONFIG_MFD_TPS65912_SPI is not set
 # CONFIG_MFD_TPS80031 is not set
-CONFIG_TWL4030_CORE=y
-CONFIG_TWL4030_POWER=y
-CONFIG_MFD_TWL4030_AUDIO=y
-CONFIG_TWL6040_CORE=y
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
 # CONFIG_MFD_WL1273_CORE is not set
 # CONFIG_MFD_LM3533 is not set
 # CONFIG_MFD_TC3589X is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
-# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_TQMX86 is not set
+# CONFIG_MFD_LOCHNAGAR is not set
 # CONFIG_MFD_ARIZONA_I2C is not set
 # CONFIG_MFD_ARIZONA_SPI is not set
 # CONFIG_MFD_WM8400 is not set
@@ -2189,21 +2851,22 @@ CONFIG_TWL6040_CORE=y
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_ROHM_BD718XX is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_STMFX is not set
+# end of Multifunction device drivers
+
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
 # CONFIG_REGULATOR_88PG86X is not set
-CONFIG_REGULATOR_ACT8865=y
+# CONFIG_REGULATOR_ACT8865 is not set
 # CONFIG_REGULATOR_AD5398 is not set
 # CONFIG_REGULATOR_ANATOP is not set
-CONFIG_REGULATOR_AS3722=y
-# CONFIG_REGULATOR_AXP20X is not set
-# CONFIG_REGULATOR_DA9052 is not set
 # CONFIG_REGULATOR_DA9210 is not set
 # CONFIG_REGULATOR_DA9211 is not set
-CONFIG_REGULATOR_FAN53555=y
+# CONFIG_REGULATOR_FAN53555 is not set
 # CONFIG_REGULATOR_GPIO is not set
 # CONFIG_REGULATOR_ISL9305 is not set
 # CONFIG_REGULATOR_ISL6271A is not set
@@ -2218,19 +2881,14 @@ CONFIG_REGULATOR_FAN53555=y
 # CONFIG_REGULATOR_MAX8660 is not set
 # CONFIG_REGULATOR_MAX8952 is not set
 # CONFIG_REGULATOR_MAX8973 is not set
-# CONFIG_REGULATOR_MAX77686 is not set
-# CONFIG_REGULATOR_MAX77802 is not set
+# CONFIG_REGULATOR_MCP16502 is not set
 # CONFIG_REGULATOR_MT6311 is not set
-CONFIG_REGULATOR_PALMAS=y
 # CONFIG_REGULATOR_PFUZE100 is not set
 # CONFIG_REGULATOR_PV88060 is not set
 # CONFIG_REGULATOR_PV88080 is not set
 # CONFIG_REGULATOR_PV88090 is not set
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK808=y
-# CONFIG_REGULATOR_S2MPA01 is not set
-# CONFIG_REGULATOR_S2MPS11 is not set
-# CONFIG_REGULATOR_S5M8767 is not set
 # CONFIG_REGULATOR_SY8106A is not set
 # CONFIG_REGULATOR_TPS51632 is not set
 # CONFIG_REGULATOR_TPS62360 is not set
@@ -2238,16 +2896,151 @@ CONFIG_REGULATOR_RK808=y
 # CONFIG_REGULATOR_TPS6507X is not set
 # CONFIG_REGULATOR_TPS65132 is not set
 # CONFIG_REGULATOR_TPS6524X is not set
-CONFIG_REGULATOR_TWL4030=y
+CONFIG_REGULATOR_TPS6586X=y
 # CONFIG_REGULATOR_VCTRL is not set
-# CONFIG_RC_CORE is not set
-# CONFIG_MEDIA_SUPPORT is not set
+CONFIG_RC_CORE=y
+CONFIG_RC_MAP=y
+# CONFIG_LIRC is not set
+CONFIG_RC_DECODERS=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_SANYO_DECODER=y
+CONFIG_IR_SHARP_DECODER=y
+CONFIG_IR_MCE_KBD_DECODER=y
+CONFIG_IR_XMP_DECODER=y
+# CONFIG_IR_IMON_DECODER is not set
+# CONFIG_IR_RCMM_DECODER is not set
+# CONFIG_RC_DEVICES is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_SDR_SUPPORT is not set
+# CONFIG_MEDIA_CEC_SUPPORT is not set
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_MEDIA_CONTROLLER_REQUEST_API=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+
+#
+# Media drivers
+#
+CONFIG_MEDIA_USB_SUPPORT=y
+
+#
+# Webcam devices
+#
+CONFIG_USB_VIDEO_CLASS=y
+# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
+# CONFIG_USB_GSPCA is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_USBTV is not set
+
+#
+# Webcam, TV (analog/digital) USB devices
+#
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_V4L_PLATFORM_DRIVERS is not set
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
+# CONFIG_VIDEO_SH_VEU is not set
+# CONFIG_VIDEO_ROCKCHIP_RGA is not set
+CONFIG_V4L_TEST_DRIVERS=y
+# CONFIG_VIDEO_VIMC is not set
+# CONFIG_VIDEO_VIVID is not set
+# CONFIG_VIDEO_VIM2M is not set
+# CONFIG_VIDEO_VICODEC is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+# CONFIG_CYPRESS_FIRMWARE is not set
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_V4L2=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_VMALLOC=y
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
+#
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Audio decoders, processors and mixers
+#
+
+#
+# RDS decoders
+#
+
+#
+# Video decoders
+#
+
+#
+# Video and audio decoders
+#
+
+#
+# Video encoders
+#
+
+#
+# Camera sensor devices
+#
+
+#
+# Lens drivers
+#
+
+#
+# Flash devices
+#
+
+#
+# Video improvement chips
+#
+
+#
+# Audio/Video compression chips
+#
+
+#
+# SDR tuner chips
+#
+
+#
+# Miscellaneous helper chips
+#
+
+#
+# Media SPI Adapters
+#
+# end of Media SPI Adapters
+
+#
+# Tools to develop new frontends
+#
 
 #
 # Graphics support
 #
-CONFIG_VGA_ARB=y
-CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_IMX_IPUV3_CORE is not set
 CONFIG_DRM=y
 CONFIG_DRM_MIPI_DSI=y
@@ -2259,9 +3052,11 @@ CONFIG_DRM_KMS_FB_HELPER=y
 CONFIG_DRM_FBDEV_EMULATION=y
 CONFIG_DRM_FBDEV_OVERALLOC=100
 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
-CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
 # CONFIG_DRM_DP_CEC is not set
 CONFIG_DRM_GEM_CMA_HELPER=y
+CONFIG_DRM_GEM_SHMEM_HELPER=y
+CONFIG_DRM_SCHED=y
 
 #
 # I2C encoder or helper chips
@@ -2270,41 +3065,38 @@ CONFIG_DRM_GEM_CMA_HELPER=y
 # CONFIG_DRM_I2C_SIL164 is not set
 # CONFIG_DRM_I2C_NXP_TDA998X is not set
 # CONFIG_DRM_I2C_NXP_TDA9950 is not set
+# end of I2C encoder or helper chips
+
+#
+# ARM devices
+#
 # CONFIG_DRM_HDLCD is not set
 # CONFIG_DRM_MALI_DISPLAY is not set
-# CONFIG_DRM_RADEON is not set
-# CONFIG_DRM_AMDGPU is not set
+# CONFIG_DRM_KOMEDA is not set
+# end of ARM devices
 
 #
 # ACP (Audio CoProcessor) Configuration
 #
+# end of ACP (Audio CoProcessor) Configuration
 
-#
-# AMD Library routines
-#
-# CONFIG_DRM_NOUVEAU is not set
-# CONFIG_DRM_VGEM is not set
-# CONFIG_DRM_VKMS is not set
+CONFIG_DRM_VGEM=y
+CONFIG_DRM_VKMS=y
 # CONFIG_DRM_EXYNOS is not set
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_ROCKCHIP_ANALOGIX_DP=y
-# CONFIG_ROCKCHIP_CDN_DP is not set
 CONFIG_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_DW_MIPI_DSI=y
-# CONFIG_ROCKCHIP_INNO_HDMI is not set
+CONFIG_ROCKCHIP_INNO_HDMI=y
 # CONFIG_ROCKCHIP_LVDS is not set
-# CONFIG_DRM_UDL is not set
-# CONFIG_DRM_AST is not set
-# CONFIG_DRM_MGAG200 is not set
-# CONFIG_DRM_CIRRUS_QEMU is not set
+# CONFIG_ROCKCHIP_RGB is not set
+# CONFIG_ROCKCHIP_RK3066_HDMI is not set
+CONFIG_DRM_UDL=y
 # CONFIG_DRM_ARMADA is not set
 # CONFIG_DRM_RCAR_DW_HDMI is not set
 # CONFIG_DRM_RCAR_LVDS is not set
 # CONFIG_DRM_OMAP is not set
 # CONFIG_DRM_TILCDC is not set
-# CONFIG_DRM_QXL is not set
-# CONFIG_DRM_BOCHS is not set
-# CONFIG_DRM_VIRTIO_GPU is not set
 # CONFIG_DRM_FSL_DCU is not set
 # CONFIG_DRM_STM is not set
 CONFIG_DRM_PANEL=y
@@ -2315,23 +3107,34 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_ARM_VERSATILE is not set
 # CONFIG_DRM_PANEL_LVDS is not set
 CONFIG_DRM_PANEL_SIMPLE=y
+# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
 # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
 # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
 # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
 # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
+# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
 # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
 # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
 # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
 # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
 # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
+# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set
+# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
 # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
 # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
 # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
 # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
 # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
 # CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
 # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
+# CONFIG_DRM_PANEL_TPO_TPG110 is not set
+# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
+# end of Display Panels
+
 CONFIG_DRM_BRIDGE=y
 CONFIG_DRM_PANEL_BRIDGE=y
 
@@ -2349,31 +3152,37 @@ CONFIG_DRM_PANEL_BRIDGE=y
 # CONFIG_DRM_SII902X is not set
 # CONFIG_DRM_SII9234 is not set
 # CONFIG_DRM_THINE_THC63LVD1024 is not set
+# CONFIG_DRM_TOSHIBA_TC358764 is not set
 # CONFIG_DRM_TOSHIBA_TC358767 is not set
 # CONFIG_DRM_TI_TFP410 is not set
+# CONFIG_DRM_TI_SN65DSI86 is not set
 CONFIG_DRM_ANALOGIX_DP=y
 # CONFIG_DRM_I2C_ADV7511 is not set
 CONFIG_DRM_DW_HDMI=y
-# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y
 CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
 # CONFIG_DRM_DW_HDMI_CEC is not set
+CONFIG_DRM_DW_MIPI_DSI=y
+# end of Display Interface Bridges
+
 # CONFIG_DRM_STI is not set
+# CONFIG_DRM_ETNAVIV is not set
 # CONFIG_DRM_ARCPGU is not set
-# CONFIG_DRM_HISI_HIBMC is not set
 # CONFIG_DRM_MXSFB is not set
 # CONFIG_DRM_TINYDRM is not set
 # CONFIG_DRM_PL111 is not set
-# CONFIG_DRM_TVE200 is not set
+# CONFIG_DRM_LIMA is not set
+CONFIG_DRM_PANFROST=y
 # CONFIG_DRM_LEGACY is not set
 CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
 
 #
 # Frame buffer Devices
 #
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_CMDLINE=y
 CONFIG_FB_NOTIFY=y
+CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
@@ -2389,60 +3198,38 @@ CONFIG_FB_MODE_HELPERS=y
 #
 # Frame buffer hardware drivers
 #
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
 # CONFIG_FB_ARMCLCD is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_ASILIANT is not set
-# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_UVESA is not set
 # CONFIG_FB_OPENCORES is not set
 # CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_NVIDIA is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_I740 is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_S3 is not set
-# CONFIG_FB_SAVAGE is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_KYRO is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_VT8623 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_ARK is not set
-# CONFIG_FB_PM3 is not set
-# CONFIG_FB_CARMINE is not set
 # CONFIG_FB_SMSCUFX is not set
 # CONFIG_FB_UDL is not set
 # CONFIG_FB_IBM_GXT4500 is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
-# CONFIG_FB_MB862XX is not set
-# CONFIG_FB_BROADSHEET is not set
 CONFIG_FB_SIMPLE=y
 # CONFIG_FB_SSD1307 is not set
-# CONFIG_FB_SM712 is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# end of Frame buffer Devices
+
+#
+# Backlight & LCD device support
+#
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_GENERIC=y
 CONFIG_BACKLIGHT_PWM=y
-# CONFIG_BACKLIGHT_DA9052 is not set
 # CONFIG_BACKLIGHT_PM8941_WLED is not set
 # CONFIG_BACKLIGHT_ADP8860 is not set
 # CONFIG_BACKLIGHT_ADP8870 is not set
 # CONFIG_BACKLIGHT_LM3630A is not set
 # CONFIG_BACKLIGHT_LM3639 is not set
 # CONFIG_BACKLIGHT_LP855X is not set
-# CONFIG_BACKLIGHT_PANDORA is not set
 # CONFIG_BACKLIGHT_GPIO is not set
 # CONFIG_BACKLIGHT_LV5207LP is not set
 # CONFIG_BACKLIGHT_BD6107 is not set
 # CONFIG_BACKLIGHT_ARCXCNN is not set
+# end of Backlight & LCD device support
+
 CONFIG_VIDEOMODE_HELPERS=y
 CONFIG_HDMI=y
 
@@ -2454,7 +3241,11 @@ CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
 # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 # CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
+# end of Console display driver support
+
 # CONFIG_LOGO is not set
+# end of Graphics support
+
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
@@ -2462,7 +3253,9 @@ CONFIG_SND_PCM=y
 CONFIG_SND_PCM_ELD=y
 CONFIG_SND_PCM_IEC958=y
 CONFIG_SND_DMAENGINE_PCM=y
+CONFIG_SND_HWDEP=y
 CONFIG_SND_SEQ_DEVICE=y
+CONFIG_SND_RAWMIDI=y
 CONFIG_SND_JACK=y
 CONFIG_SND_JACK_INPUT_DEV=y
 # CONFIG_SND_OSSEMUL is not set
@@ -2470,94 +3263,49 @@ CONFIG_SND_PCM_TIMER=y
 CONFIG_SND_HRTIMER=y
 CONFIG_SND_DYNAMIC_MINORS=y
 CONFIG_SND_MAX_CARDS=32
-# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_PROC_FS=y
-# CONFIG_SND_VERBOSE_PROCFS is not set
+CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
 CONFIG_SND_SEQUENCER=y
-# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_SEQ_DUMMY=y
 CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_PCI=y
-# CONFIG_SND_AD1889 is not set
-# CONFIG_SND_ALS300 is not set
-# CONFIG_SND_ALI5451 is not set
-# CONFIG_SND_ATIIXP is not set
-# CONFIG_SND_ATIIXP_MODEM is not set
-# CONFIG_SND_AU8810 is not set
-# CONFIG_SND_AU8820 is not set
-# CONFIG_SND_AU8830 is not set
-# CONFIG_SND_AW2 is not set
-# CONFIG_SND_AZT3328 is not set
-# CONFIG_SND_BT87X is not set
-# CONFIG_SND_CA0106 is not set
-# CONFIG_SND_CMIPCI is not set
-# CONFIG_SND_OXYGEN is not set
-# CONFIG_SND_CS4281 is not set
-# CONFIG_SND_CS46XX is not set
-# CONFIG_SND_CTXFI is not set
-# CONFIG_SND_DARLA20 is not set
-# CONFIG_SND_GINA20 is not set
-# CONFIG_SND_LAYLA20 is not set
-# CONFIG_SND_DARLA24 is not set
-# CONFIG_SND_GINA24 is not set
-# CONFIG_SND_LAYLA24 is not set
-# CONFIG_SND_MONA is not set
-# CONFIG_SND_MIA is not set
-# CONFIG_SND_ECHO3G is not set
-# CONFIG_SND_INDIGO is not set
-# CONFIG_SND_INDIGOIO is not set
-# CONFIG_SND_INDIGODJ is not set
-# CONFIG_SND_INDIGOIOX is not set
-# CONFIG_SND_INDIGODJX is not set
-# CONFIG_SND_EMU10K1 is not set
-# CONFIG_SND_EMU10K1X is not set
-# CONFIG_SND_ENS1370 is not set
-# CONFIG_SND_ENS1371 is not set
-# CONFIG_SND_ES1938 is not set
-# CONFIG_SND_ES1968 is not set
-# CONFIG_SND_FM801 is not set
-# CONFIG_SND_HDSP is not set
-# CONFIG_SND_HDSPM is not set
-# CONFIG_SND_ICE1712 is not set
-# CONFIG_SND_ICE1724 is not set
-# CONFIG_SND_INTEL8X0 is not set
-# CONFIG_SND_INTEL8X0M is not set
-# CONFIG_SND_KORG1212 is not set
-# CONFIG_SND_LOLA is not set
-# CONFIG_SND_LX6464ES is not set
-# CONFIG_SND_MAESTRO3 is not set
-# CONFIG_SND_MIXART is not set
-# CONFIG_SND_NM256 is not set
-# CONFIG_SND_PCXHR is not set
-# CONFIG_SND_RIPTIDE is not set
-# CONFIG_SND_RME32 is not set
-# CONFIG_SND_RME96 is not set
-# CONFIG_SND_RME9652 is not set
-# CONFIG_SND_SE6X is not set
-# CONFIG_SND_SONICVIBES is not set
-# CONFIG_SND_TRIDENT is not set
-# CONFIG_SND_VIA82XX is not set
-# CONFIG_SND_VIA82XX_MODEM is not set
-# CONFIG_SND_VIRTUOSO is not set
-# CONFIG_SND_VX222 is not set
-# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_SEQ_MIDI_EVENT=y
+CONFIG_SND_SEQ_MIDI=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
 
 #
 # HD-Audio
 #
-# CONFIG_SND_HDA_INTEL is not set
+# end of HD-Audio
+
 CONFIG_SND_HDA_PREALLOC_SIZE=64
 # CONFIG_SND_ARM is not set
 # CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+# CONFIG_SND_USB_HIFACE is not set
+# CONFIG_SND_BCD2000 is not set
+# CONFIG_SND_USB_POD is not set
+# CONFIG_SND_USB_PODHD is not set
+# CONFIG_SND_USB_TONEPORT is not set
+# CONFIG_SND_USB_VARIAX is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_AMD_ACP is not set
 # CONFIG_SND_ATMEL_SOC is not set
-CONFIG_SND_DESIGNWARE_I2S=y
-# CONFIG_SND_DESIGNWARE_PCM is not set
+# CONFIG_SND_DESIGNWARE_I2S is not set
 
 #
 # SoC Audio for Freescale CPUs
@@ -2568,24 +3316,35 @@ CONFIG_SND_DESIGNWARE_I2S=y
 #
 # CONFIG_SND_SOC_FSL_ASRC is not set
 # CONFIG_SND_SOC_FSL_SAI is not set
+# CONFIG_SND_SOC_FSL_AUDMIX is not set
 # CONFIG_SND_SOC_FSL_SSI is not set
 # CONFIG_SND_SOC_FSL_SPDIF is not set
 # CONFIG_SND_SOC_FSL_ESAI is not set
+# CONFIG_SND_SOC_FSL_MICFIL is not set
 # CONFIG_SND_SOC_IMX_AUDMUX is not set
+# end of SoC Audio for Freescale CPUs
+
 # CONFIG_SND_I2S_HI6210_I2S is not set
 # CONFIG_SND_SOC_IMG is not set
+# CONFIG_SND_SOC_MTK_BTCVSD is not set
 CONFIG_SND_SOC_ROCKCHIP=y
 CONFIG_SND_SOC_ROCKCHIP_I2S=y
-CONFIG_SND_SOC_ROCKCHIP_PDM=y
-CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
+# CONFIG_SND_SOC_ROCKCHIP_PDM is not set
+# CONFIG_SND_SOC_ROCKCHIP_SPDIF is not set
 CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
-CONFIG_SND_SOC_ROCKCHIP_RT5645=y
-CONFIG_SND_SOC_RK3288_HDMI_ANALOG=y
+# CONFIG_SND_SOC_ROCKCHIP_RT5645 is not set
+# CONFIG_SND_SOC_RK3288_HDMI_ANALOG is not set
 # CONFIG_SND_SOC_RK3399_GRU_SOUND is not set
+# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
 
 #
 # STMicroelectronics STM32 SOC audio support
 #
+# end of STMicroelectronics STM32 SOC audio support
+
+# CONFIG_SND_SOC_XILINX_I2S is not set
+# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
+# CONFIG_SND_SOC_XILINX_SPDIF is not set
 # CONFIG_SND_SOC_XTFPGA_I2S is not set
 # CONFIG_ZX_TDM is not set
 CONFIG_SND_SOC_I2C_AND_SPI=y
@@ -2599,6 +3358,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ADAU1761_SPI is not set
 # CONFIG_SND_SOC_ADAU7002 is not set
 # CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4118 is not set
 # CONFIG_SND_SOC_AK4458 is not set
 # CONFIG_SND_SOC_AK4554 is not set
 # CONFIG_SND_SOC_AK4613 is not set
@@ -2608,10 +3368,12 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ALC5623 is not set
 # CONFIG_SND_SOC_BD28623 is not set
 # CONFIG_SND_SOC_BT_SCO is not set
+# CONFIG_SND_SOC_CROS_EC_CODEC is not set
 # CONFIG_SND_SOC_CS35L32 is not set
 # CONFIG_SND_SOC_CS35L33 is not set
 # CONFIG_SND_SOC_CS35L34 is not set
 # CONFIG_SND_SOC_CS35L35 is not set
+# CONFIG_SND_SOC_CS35L36 is not set
 # CONFIG_SND_SOC_CS42L42 is not set
 # CONFIG_SND_SOC_CS42L51_I2C is not set
 # CONFIG_SND_SOC_CS42L52 is not set
@@ -2623,17 +3385,19 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_CS4271_SPI is not set
 # CONFIG_SND_SOC_CS42XX8_I2C is not set
 # CONFIG_SND_SOC_CS43130 is not set
+# CONFIG_SND_SOC_CS4341 is not set
 # CONFIG_SND_SOC_CS4349 is not set
 # CONFIG_SND_SOC_CS53L30 is not set
+# CONFIG_SND_SOC_DMIC is not set
 CONFIG_SND_SOC_HDMI_CODEC=y
 # CONFIG_SND_SOC_ES7134 is not set
 # CONFIG_SND_SOC_ES7241 is not set
 # CONFIG_SND_SOC_ES8316 is not set
-CONFIG_SND_SOC_ES8328=y
-CONFIG_SND_SOC_ES8328_I2C=y
-CONFIG_SND_SOC_ES8328_SPI=y
+# CONFIG_SND_SOC_ES8328_I2C is not set
+# CONFIG_SND_SOC_ES8328_SPI is not set
 # CONFIG_SND_SOC_GTM601 is not set
 # CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_MAX98088 is not set
 CONFIG_SND_SOC_MAX98090=y
 # CONFIG_SND_SOC_MAX98504 is not set
 # CONFIG_SND_SOC_MAX9867 is not set
@@ -2647,14 +3411,15 @@ CONFIG_SND_SOC_MAX98090=y
 # CONFIG_SND_SOC_PCM179X_SPI is not set
 # CONFIG_SND_SOC_PCM186X_I2C is not set
 # CONFIG_SND_SOC_PCM186X_SPI is not set
+# CONFIG_SND_SOC_PCM3060_I2C is not set
+# CONFIG_SND_SOC_PCM3060_SPI is not set
 # CONFIG_SND_SOC_PCM3168A_I2C is not set
 # CONFIG_SND_SOC_PCM3168A_SPI is not set
 # CONFIG_SND_SOC_PCM512x_I2C is not set
 # CONFIG_SND_SOC_PCM512x_SPI is not set
-CONFIG_SND_SOC_RL6231=y
+# CONFIG_SND_SOC_RK3328 is not set
 # CONFIG_SND_SOC_RT5616 is not set
 # CONFIG_SND_SOC_RT5631 is not set
-CONFIG_SND_SOC_RT5645=y
 # CONFIG_SND_SOC_SGTL5000 is not set
 # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
 # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
@@ -2673,7 +3438,8 @@ CONFIG_SND_SOC_RT5645=y
 # CONFIG_SND_SOC_TAS6424 is not set
 # CONFIG_SND_SOC_TDA7419 is not set
 # CONFIG_SND_SOC_TFA9879 is not set
-# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
+CONFIG_SND_SOC_TLV320AIC23=y
+CONFIG_SND_SOC_TLV320AIC23_I2C=y
 # CONFIG_SND_SOC_TLV320AIC23_SPI is not set
 # CONFIG_SND_SOC_TLV320AIC31XX is not set
 # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
@@ -2692,13 +3458,14 @@ CONFIG_SND_SOC_TS3A227E=y
 # CONFIG_SND_SOC_WM8737 is not set
 # CONFIG_SND_SOC_WM8741 is not set
 # CONFIG_SND_SOC_WM8750 is not set
-# CONFIG_SND_SOC_WM8753 is not set
+CONFIG_SND_SOC_WM8753=y
 # CONFIG_SND_SOC_WM8770 is not set
 # CONFIG_SND_SOC_WM8776 is not set
 # CONFIG_SND_SOC_WM8782 is not set
 # CONFIG_SND_SOC_WM8804_I2C is not set
 # CONFIG_SND_SOC_WM8804_SPI is not set
-# CONFIG_SND_SOC_WM8903 is not set
+CONFIG_SND_SOC_WM8903=y
+# CONFIG_SND_SOC_WM8904 is not set
 # CONFIG_SND_SOC_WM8960 is not set
 # CONFIG_SND_SOC_WM8962 is not set
 # CONFIG_SND_SOC_WM8974 is not set
@@ -2707,20 +3474,22 @@ CONFIG_SND_SOC_TS3A227E=y
 # CONFIG_SND_SOC_ZX_AUD96P22 is not set
 # CONFIG_SND_SOC_MAX9759 is not set
 # CONFIG_SND_SOC_MT6351 is not set
+# CONFIG_SND_SOC_MT6358 is not set
 # CONFIG_SND_SOC_NAU8540 is not set
 # CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SOC_NAU8822 is not set
 # CONFIG_SND_SOC_NAU8824 is not set
 # CONFIG_SND_SOC_TPA6130A2 is not set
+# end of CODEC drivers
+
 # CONFIG_SND_SIMPLE_CARD is not set
-# CONFIG_SND_SIMPLE_SCU_CARD is not set
 # CONFIG_SND_AUDIO_GRAPH_CARD is not set
-# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set
 
 #
 # HID support
 #
 CONFIG_HID=y
-# CONFIG_HID_BATTERY_STRENGTH is not set
+CONFIG_HID_BATTERY_STRENGTH=y
 CONFIG_HIDRAW=y
 CONFIG_UHID=y
 CONFIG_HID_GENERIC=y
@@ -2731,51 +3500,62 @@ CONFIG_HID_GENERIC=y
 # CONFIG_HID_A4TECH is not set
 # CONFIG_HID_ACCUTOUCH is not set
 # CONFIG_HID_ACRUX is not set
-# CONFIG_HID_APPLE is not set
+CONFIG_HID_APPLE=y
 # CONFIG_HID_APPLEIR is not set
 # CONFIG_HID_ASUS is not set
 # CONFIG_HID_AUREAL is not set
 # CONFIG_HID_BELKIN is not set
 # CONFIG_HID_BETOP_FF is not set
-# CONFIG_HID_CHERRY is not set
-# CONFIG_HID_CHICONY is not set
-CONFIG_HID_CORSAIR=y
+# CONFIG_HID_BIGBEN_FF is not set
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+# CONFIG_HID_CORSAIR is not set
 # CONFIG_HID_COUGAR is not set
+# CONFIG_HID_MACALLY is not set
 # CONFIG_HID_PRODIKEYS is not set
 # CONFIG_HID_CMEDIA is not set
 # CONFIG_HID_CP2112 is not set
 # CONFIG_HID_CYPRESS is not set
 # CONFIG_HID_DRAGONRISE is not set
 # CONFIG_HID_EMS_FF is not set
-CONFIG_HID_ELAN=y
+# CONFIG_HID_ELAN is not set
 # CONFIG_HID_ELECOM is not set
 # CONFIG_HID_ELO is not set
 # CONFIG_HID_EZKEY is not set
 # CONFIG_HID_GEMBIRD is not set
 # CONFIG_HID_GFRM is not set
-# CONFIG_HID_HOLTEK is not set
+CONFIG_HID_HOLTEK=y
+# CONFIG_HOLTEK_FF is not set
 # CONFIG_HID_GOOGLE_HAMMER is not set
 # CONFIG_HID_GT683R is not set
 # CONFIG_HID_KEYTOUCH is not set
 # CONFIG_HID_KYE is not set
 # CONFIG_HID_UCLOGIC is not set
 # CONFIG_HID_WALTOP is not set
+# CONFIG_HID_VIEWSONIC is not set
 # CONFIG_HID_GYRATION is not set
 # CONFIG_HID_ICADE is not set
 # CONFIG_HID_ITE is not set
 # CONFIG_HID_JABRA is not set
 # CONFIG_HID_TWINHAN is not set
-# CONFIG_HID_KENSINGTON is not set
+CONFIG_HID_KENSINGTON=y
 # CONFIG_HID_LCPOWER is not set
-# CONFIG_HID_LED is not set
+CONFIG_HID_LED=y
 # CONFIG_HID_LENOVO is not set
-# CONFIG_HID_LOGITECH is not set
-# CONFIG_HID_MAGICMOUSE is not set
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_LOGITECH_DJ=y
+CONFIG_HID_LOGITECH_HIDPP=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_LOGIWHEELS_FF is not set
+CONFIG_HID_MAGICMOUSE=y
+# CONFIG_HID_MALTRON is not set
 # CONFIG_HID_MAYFLASH is not set
 # CONFIG_HID_REDRAGON is not set
-# CONFIG_HID_MICROSOFT is not set
+CONFIG_HID_MICROSOFT=y
 # CONFIG_HID_MONTEREY is not set
-# CONFIG_HID_MULTITOUCH is not set
+CONFIG_HID_MULTITOUCH=y
 # CONFIG_HID_NTI is not set
 # CONFIG_HID_NTRIG is not set
 # CONFIG_HID_ORTEK is not set
@@ -2783,50 +3563,56 @@ CONFIG_HID_ELAN=y
 # CONFIG_HID_PENMOUNT is not set
 # CONFIG_HID_PETALYNX is not set
 # CONFIG_HID_PICOLCD is not set
-# CONFIG_HID_PLANTRONICS is not set
-# CONFIG_HID_PRIMAX is not set
+CONFIG_HID_PLANTRONICS=y
+CONFIG_HID_PRIMAX=y
 # CONFIG_HID_RETRODE is not set
 # CONFIG_HID_ROCCAT is not set
 # CONFIG_HID_SAITEK is not set
 # CONFIG_HID_SAMSUNG is not set
-# CONFIG_HID_SONY is not set
+CONFIG_HID_SONY=y
+# CONFIG_SONY_FF is not set
 # CONFIG_HID_SPEEDLINK is not set
 # CONFIG_HID_STEAM is not set
 # CONFIG_HID_STEELSERIES is not set
 # CONFIG_HID_SUNPLUS is not set
-# CONFIG_HID_RMI is not set
+CONFIG_HID_RMI=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
 # CONFIG_HID_TIVO is not set
 # CONFIG_HID_TOPSEED is not set
-# CONFIG_HID_THINGM is not set
+CONFIG_HID_THINGM=y
 # CONFIG_HID_THRUSTMASTER is not set
 # CONFIG_HID_UDRAW_PS3 is not set
-# CONFIG_HID_WACOM is not set
-# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_U2FZERO is not set
+CONFIG_HID_WACOM=y
+CONFIG_HID_WIIMOTE=y
 # CONFIG_HID_XINMO is not set
 # CONFIG_HID_ZEROPLUS is not set
 # CONFIG_HID_ZYDACRON is not set
 # CONFIG_HID_SENSOR_HUB is not set
 # CONFIG_HID_ALPS is not set
+# end of Special HID drivers
 
 #
 # USB HID support
 #
 CONFIG_USB_HID=y
-CONFIG_HID_PID=y
-# CONFIG_USB_HIDDEV is not set
+# CONFIG_HID_PID is not set
+CONFIG_USB_HIDDEV=y
+# end of USB HID support
 
 #
 # I2C HID support
 #
-# CONFIG_I2C_HID is not set
+CONFIG_I2C_HID=y
+# end of I2C HID support
+# end of HID support
+
 CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_COMMON=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB=y
-CONFIG_USB_PCI=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 
 #
@@ -2838,7 +3624,8 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
-# CONFIG_USB_MON is not set
+CONFIG_USB_AUTOSUSPEND_DELAY=2
+CONFIG_USB_MON=y
 # CONFIG_USB_WUSB_CBAF is not set
 
 #
@@ -2849,23 +3636,23 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_FSL is not set
 CONFIG_USB_EHCI_HCD_PLATFORM=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_FOTG210_HCD is not set
 # CONFIG_USB_MAX3421_HCD is not set
 # CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_BCMA is not set
 # CONFIG_USB_HCD_TEST_MODE is not set
 
 #
 # USB Device Class drivers
 #
-# CONFIG_USB_ACM is not set
-CONFIG_USB_PRINTER=y
+CONFIG_USB_ACM=y
+# CONFIG_USB_PRINTER is not set
 # CONFIG_USB_WDM is not set
 # CONFIG_USB_TMC is not set
 
@@ -2878,20 +3665,19 @@ CONFIG_USB_PRINTER=y
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
-CONFIG_USB_STORAGE_REALTEK=y
-CONFIG_REALTEK_AUTOPM=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_STORAGE_ALAUDA=y
-CONFIG_USB_STORAGE_ONETOUCH=y
-CONFIG_USB_STORAGE_KARMA=y
-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
-CONFIG_USB_STORAGE_ENE_UB6250=y
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
 CONFIG_USB_UAS=y
 
 #
@@ -2908,7 +3694,8 @@ CONFIG_USB_DWC2_HOST=y
 #
 # Gadget/Dual-role mode requires USB Gadget support to be enabled
 #
-# CONFIG_USB_DWC2_PCI is not set
+# CONFIG_USB_DWC2_PERIPHERAL is not set
+# CONFIG_USB_DWC2_DUAL_ROLE is not set
 # CONFIG_USB_DWC2_DEBUG is not set
 # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
 # CONFIG_USB_CHIPIDEA is not set
@@ -2917,7 +3704,61 @@ CONFIG_USB_DWC2_HOST=y
 #
 # USB port drivers
 #
-# CONFIG_USB_SERIAL is not set
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+CONFIG_USB_SERIAL_CH341=y
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+CONFIG_USB_SERIAL_CP210X=y
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_F8153X is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+CONFIG_USB_SERIAL_KEYSPAN=y
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MXUPORT is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_SERIAL_OTI6858=y
+# CONFIG_USB_SERIAL_QCAUX is not set
+CONFIG_USB_SERIAL_QUALCOMM=y
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+CONFIG_USB_SERIAL_SIERRAWIRELESS=y
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SERIAL_WISHBONE is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_UPD78F0730 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
 
 #
 # USB Miscellaneous drivers
@@ -2942,22 +3783,68 @@ CONFIG_USB_DWC2_HOST=y
 # CONFIG_USB_EHSET_TEST_FIXTURE is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_YUREX is not set
-# CONFIG_USB_EZUSB_FX2 is not set
+CONFIG_USB_EZUSB_FX2=y
 # CONFIG_USB_HUB_USB251XB is not set
 # CONFIG_USB_HSIC_USB3503 is not set
 # CONFIG_USB_HSIC_USB4604 is not set
 # CONFIG_USB_LINK_LAYER_TEST is not set
+# CONFIG_USB_CHAOSKEY is not set
 
 #
 # USB Physical Layer drivers
 #
-CONFIG_USB_PHY=y
-CONFIG_NOP_USB_XCEIV=y
-# CONFIG_AM335X_PHY_USB is not set
-CONFIG_USB_GPIO_VBUS=y
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_USB_GPIO_VBUS is not set
 # CONFIG_USB_ISP1301 is not set
 # CONFIG_USB_ULPI is not set
-# CONFIG_USB_GADGET is not set
+# end of USB Physical Layer drivers
+
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_GR_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_SNP_UDC_PLAT is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# end of USB Peripheral Controller
+
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_F_FS=y
+CONFIG_USB_CONFIGFS=y
+# CONFIG_USB_CONFIGFS_SERIAL is not set
+# CONFIG_USB_CONFIGFS_ACM is not set
+# CONFIG_USB_CONFIGFS_OBEX is not set
+# CONFIG_USB_CONFIGFS_NCM is not set
+# CONFIG_USB_CONFIGFS_ECM is not set
+# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set
+# CONFIG_USB_CONFIGFS_RNDIS is not set
+# CONFIG_USB_CONFIGFS_EEM is not set
+# CONFIG_USB_CONFIGFS_MASS_STORAGE is not set
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+CONFIG_USB_CONFIGFS_F_FS=y
+# CONFIG_USB_CONFIGFS_F_UAC1 is not set
+# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+# CONFIG_USB_CONFIGFS_F_MIDI is not set
+# CONFIG_USB_CONFIGFS_F_HID is not set
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
 # CONFIG_TYPEC is not set
 # CONFIG_USB_ROLE_SWITCH is not set
 # CONFIG_USB_LED_TRIG is not set
@@ -2965,11 +3852,12 @@ CONFIG_USB_GPIO_VBUS=y
 # CONFIG_UWB is not set
 CONFIG_MMC=y
 CONFIG_PWRSEQ_EMMC=y
+# CONFIG_PWRSEQ_SD8787 is not set
 CONFIG_PWRSEQ_SIMPLE=y
 CONFIG_MMC_BLOCK=y
 CONFIG_MMC_BLOCK_MINORS=16
 # CONFIG_SDIO_UART is not set
-# CONFIG_MMC_TEST is not set
+CONFIG_MMC_TEST=y
 
 #
 # MMC/SD/SDIO Host Controller Drivers
@@ -2977,34 +3865,28 @@ CONFIG_MMC_BLOCK_MINORS=16
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_ARMMMCI is not set
 CONFIG_MMC_SDHCI=y
-# CONFIG_MMC_SDHCI_PCI is not set
 CONFIG_MMC_SDHCI_PLTFM=y
 # CONFIG_MMC_SDHCI_OF_ARASAN is not set
 # CONFIG_MMC_SDHCI_OF_AT91 is not set
 # CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
-CONFIG_MMC_SDHCI_CADENCE=y
+# CONFIG_MMC_SDHCI_CADENCE is not set
 # CONFIG_MMC_SDHCI_F_SDH30 is not set
-# CONFIG_MMC_TIFM_SD is not set
-CONFIG_MMC_SPI=y
-# CONFIG_MMC_CB710 is not set
-# CONFIG_MMC_VIA_SDMMC is not set
+# CONFIG_MMC_SPI is not set
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_PLTFM=y
 # CONFIG_MMC_DW_BLUEFIELD is not set
 # CONFIG_MMC_DW_EXYNOS is not set
 # CONFIG_MMC_DW_HI3798CV200 is not set
 # CONFIG_MMC_DW_K3 is not set
-# CONFIG_MMC_DW_PCI is not set
 CONFIG_MMC_DW_ROCKCHIP=y
 # CONFIG_MMC_VUB300 is not set
-CONFIG_MMC_USHC=y
+# CONFIG_MMC_USHC is not set
 # CONFIG_MMC_USDHI6ROL0 is not set
-CONFIG_MMC_REALTEK_USB=y
 # CONFIG_MMC_CQHCI is not set
-# CONFIG_MMC_TOSHIBA_PCI is not set
 # CONFIG_MMC_MTK is not set
 # CONFIG_MMC_SDHCI_XENON is not set
 # CONFIG_MMC_SDHCI_OMAP is not set
+# CONFIG_MMC_SDHCI_AM654 is not set
 # CONFIG_MEMSTICK is not set
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
@@ -3014,14 +3896,16 @@ CONFIG_LEDS_CLASS=y
 #
 # LED drivers
 #
+# CONFIG_LEDS_AN30259A is not set
 # CONFIG_LEDS_BCM6328 is not set
 # CONFIG_LEDS_BCM6358 is not set
 # CONFIG_LEDS_CR0014114 is not set
 # CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3532 is not set
 # CONFIG_LEDS_LM3642 is not set
 # CONFIG_LEDS_LM3692X is not set
 # CONFIG_LEDS_PCA9532 is not set
-# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_GPIO=y
 # CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_LP3952 is not set
 # CONFIG_LEDS_LP5521 is not set
@@ -3031,7 +3915,6 @@ CONFIG_LEDS_CLASS=y
 # CONFIG_LEDS_LP8860 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_PCA963X is not set
-# CONFIG_LEDS_DA9052 is not set
 # CONFIG_LEDS_DAC124S085 is not set
 # CONFIG_LEDS_PWM is not set
 # CONFIG_LEDS_REGULATOR is not set
@@ -3057,9 +3940,10 @@ CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGERS=y
 # CONFIG_LEDS_TRIGGER_TIMER is not set
 # CONFIG_LEDS_TRIGGER_ONESHOT is not set
+# CONFIG_LEDS_TRIGGER_MTD is not set
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
-CONFIG_LEDS_TRIGGER_CPU=y
+# CONFIG_LEDS_TRIGGER_CPU is not set
 # CONFIG_LEDS_TRIGGER_ACTIVITY is not set
 # CONFIG_LEDS_TRIGGER_GPIO is not set
 # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
@@ -3071,11 +3955,12 @@ CONFIG_LEDS_TRIGGER_CPU=y
 # CONFIG_LEDS_TRIGGER_CAMERA is not set
 # CONFIG_LEDS_TRIGGER_PANIC is not set
 # CONFIG_LEDS_TRIGGER_NETDEV is not set
+# CONFIG_LEDS_TRIGGER_PATTERN is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 CONFIG_EDAC_ATOMIC_SCRUB=y
 CONFIG_EDAC_SUPPORT=y
-# CONFIG_EDAC is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y
@@ -3098,14 +3983,13 @@ CONFIG_RTC_INTF_DEV=y
 # I2C RTC drivers
 #
 # CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABEOZ9 is not set
 # CONFIG_RTC_DRV_ABX80X is not set
-# CONFIG_RTC_DRV_AS3722 is not set
 # CONFIG_RTC_DRV_DS1307 is not set
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set
-CONFIG_RTC_DRV_HYM8563=y
+# CONFIG_RTC_DRV_HYM8563 is not set
 # CONFIG_RTC_DRV_MAX6900 is not set
-# CONFIG_RTC_DRV_MAX77686 is not set
 CONFIG_RTC_DRV_RK808=y
 # CONFIG_RTC_DRV_RS5C372 is not set
 # CONFIG_RTC_DRV_ISL1208 is not set
@@ -3119,16 +4003,16 @@ CONFIG_RTC_DRV_RK808=y
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_BQ32K is not set
-# CONFIG_RTC_DRV_TWL4030 is not set
-# CONFIG_RTC_DRV_PALMAS is not set
+# CONFIG_RTC_DRV_TPS6586X is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8010 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
 # CONFIG_RTC_DRV_RX8025 is not set
 # CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3028 is not set
 # CONFIG_RTC_DRV_RV8803 is not set
-# CONFIG_RTC_DRV_S5M is not set
+# CONFIG_RTC_DRV_SD3078 is not set
 
 #
 # SPI RTC drivers
@@ -3167,7 +4051,6 @@ CONFIG_RTC_I2C_AND_SPI=y
 # CONFIG_RTC_DRV_DS1685_FAMILY is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_DS2404 is not set
-# CONFIG_RTC_DRV_DA9052 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T35 is not set
@@ -3177,13 +4060,14 @@ CONFIG_RTC_I2C_AND_SPI=y
 # CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 # CONFIG_RTC_DRV_ZYNQMP is not set
-CONFIG_RTC_DRV_CROS_EC=y
+# CONFIG_RTC_DRV_CROS_EC is not set
 
 #
 # on-CPU RTC drivers
 #
 # CONFIG_RTC_DRV_PL030 is not set
 # CONFIG_RTC_DRV_PL031 is not set
+# CONFIG_RTC_DRV_CADENCE is not set
 # CONFIG_RTC_DRV_FTRTC010 is not set
 # CONFIG_RTC_DRV_SNVS is not set
 # CONFIG_RTC_DRV_R7301 is not set
@@ -3191,7 +4075,6 @@ CONFIG_RTC_DRV_CROS_EC=y
 #
 # HID Sensor RTC drivers
 #
-# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
 CONFIG_DMADEVICES=y
 # CONFIG_DMADEVICES_DEBUG is not set
 
@@ -3199,19 +4082,18 @@ CONFIG_DMADEVICES=y
 # DMA Devices
 #
 CONFIG_DMA_ENGINE=y
-CONFIG_DMA_VIRTUAL_CHANNELS=y
 CONFIG_DMA_OF=y
 # CONFIG_ALTERA_MSGDMA is not set
-CONFIG_AMBA_PL08X=y
+# CONFIG_AMBA_PL08X is not set
 # CONFIG_DW_AXI_DMAC is not set
 # CONFIG_FSL_EDMA is not set
+# CONFIG_FSL_QDMA is not set
 # CONFIG_INTEL_IDMA64 is not set
 # CONFIG_NBPFAXI_DMA is not set
 CONFIG_PL330_DMA=y
 # CONFIG_QCOM_HIDMA_MGMT is not set
 # CONFIG_QCOM_HIDMA is not set
 # CONFIG_DW_DMAC is not set
-# CONFIG_DW_DMAC_PCI is not set
 
 #
 # DMA Clients
@@ -3223,24 +4105,139 @@ CONFIG_PL330_DMA=y
 # DMABUF options
 #
 CONFIG_SYNC_FILE=y
-# CONFIG_SW_SYNC is not set
+CONFIG_SW_SYNC=y
+# CONFIG_UDMABUF is not set
+# end of DMABUF options
+
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_VFIO is not set
 # CONFIG_VIRT_DRIVERS is not set
-CONFIG_VIRTIO=y
-# CONFIG_VIRTIO_MENU is not set
+CONFIG_VIRTIO_MENU=y
+# CONFIG_VIRTIO_MMIO is not set
 
 #
 # Microsoft Hyper-V guest support
 #
-# CONFIG_STAGING is not set
+# end of Microsoft Hyper-V guest support
+
+CONFIG_STAGING=y
+# CONFIG_PRISM2_USB is not set
+# CONFIG_COMEDI is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_RTL8723BS is not set
+# CONFIG_R8712U is not set
+# CONFIG_R8188EU is not set
+# CONFIG_VT6656 is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16240 is not set
+# end of Accelerometers
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_AD7280 is not set
+# end of Analog to digital converters
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+# end of Analog digital bi-direction converters
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7746 is not set
+# end of Capacitance to digital converters
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# end of Direct Digital Synthesis
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+# end of Network Analyzer, Impedance Converters
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7854 is not set
+# end of Active energy metering IC
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S1210 is not set
+# end of Resolver to digital converters
+# end of IIO staging drivers
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# end of Speakup console speech
+
+CONFIG_STAGING_MEDIA=y
+# CONFIG_VIDEO_ROCKCHIP_VPU is not set
+
+#
+# soc_camera sensor drivers
+#
+
+#
+# Android
+#
+CONFIG_ASHMEM=y
+# CONFIG_ION is not set
+# end of Android
+
+# CONFIG_STAGING_BOARD is not set
+# CONFIG_LTE_GDM724X is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_UNISYSSPAR is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+# CONFIG_FB_TFT is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
+# CONFIG_MOST is not set
+# CONFIG_KS7010 is not set
+# CONFIG_GREYBUS is not set
+# CONFIG_PI433 is not set
+
+#
+# Gasket devices
+#
+# end of Gasket devices
+
+# CONFIG_XIL_AXIS_FIFO is not set
+# CONFIG_EROFS_FS is not set
+# CONFIG_FIELDBUS_DEV is not set
 # CONFIG_GOLDFISH is not set
 CONFIG_CHROME_PLATFORMS=y
-CONFIG_CROS_EC_CTL=y
-CONFIG_CROS_EC_I2C=y
+# CONFIG_CROS_EC_I2C is not set
 CONFIG_CROS_EC_SPI=y
 CONFIG_CROS_EC_PROTO=y
+CONFIG_CROS_EC_LIGHTBAR=y
+CONFIG_CROS_EC_VBC=y
+CONFIG_CROS_EC_DEBUGFS=y
+CONFIG_CROS_EC_SYSFS=y
 # CONFIG_MELLANOX_PLATFORM is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_HAVE_CLK_PREPARE=y
@@ -3250,10 +4247,8 @@ CONFIG_COMMON_CLK=y
 # Common Clock Framework
 #
 # CONFIG_CLK_HSDK is not set
-# CONFIG_COMMON_CLK_MAX77686 is not set
 # CONFIG_COMMON_CLK_MAX9485 is not set
 CONFIG_COMMON_CLK_RK808=y
-# CONFIG_COMMON_CLK_SCPI is not set
 # CONFIG_COMMON_CLK_SI5351 is not set
 # CONFIG_COMMON_CLK_SI514 is not set
 # CONFIG_COMMON_CLK_SI544 is not set
@@ -3261,12 +4256,12 @@ CONFIG_COMMON_CLK_RK808=y
 # CONFIG_COMMON_CLK_CDCE706 is not set
 # CONFIG_COMMON_CLK_CDCE925 is not set
 # CONFIG_COMMON_CLK_CS2000_CP is not set
-# CONFIG_COMMON_CLK_S2MPS11 is not set
-# CONFIG_CLK_TWL6040 is not set
 # CONFIG_CLK_QORIQ is not set
-# CONFIG_COMMON_CLK_PALMAS is not set
 # CONFIG_COMMON_CLK_PWM is not set
 # CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
+# end of Common Clock Framework
+
 # CONFIG_HWSPINLOCK is not set
 
 #
@@ -3281,15 +4276,10 @@ CONFIG_ROCKCHIP_TIMER=y
 CONFIG_ARM_ARCH_TIMER=y
 CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
 CONFIG_ARM_GLOBAL_TIMER=y
-CONFIG_ARM_TIMER_SP804=y
 CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
-CONFIG_MAILBOX=y
-# CONFIG_ARM_MHU is not set
-# CONFIG_PLATFORM_MHU is not set
-CONFIG_PL320_MBOX=y
-CONFIG_ROCKCHIP_MBOX=y
-# CONFIG_ALTERA_MBOX is not set
-# CONFIG_MAILBOX_TEST is not set
+# end of Clock Source drivers
+
+# CONFIG_MAILBOX is not set
 CONFIG_IOMMU_API=y
 CONFIG_IOMMU_SUPPORT=y
 
@@ -3300,6 +4290,8 @@ CONFIG_IOMMU_IO_PGTABLE=y
 CONFIG_IOMMU_IO_PGTABLE_LPAE=y
 # CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
 # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+# end of Generic IOMMU Pagetable Support
+
 # CONFIG_IOMMU_DEBUGFS is not set
 # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
 CONFIG_OF_IOMMU=y
@@ -3309,13 +4301,15 @@ CONFIG_ROCKCHIP_IOMMU=y
 #
 # Remoteproc drivers
 #
-CONFIG_REMOTEPROC=y
+# CONFIG_REMOTEPROC is not set
+# end of Remoteproc drivers
 
 #
 # Rpmsg drivers
 #
-# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
 # CONFIG_RPMSG_VIRTIO is not set
+# end of Rpmsg drivers
+
 # CONFIG_SOUNDWIRE is not set
 
 #
@@ -3325,23 +4319,41 @@ CONFIG_REMOTEPROC=y
 #
 # Amlogic SoC drivers
 #
+# end of Amlogic SoC drivers
+
+#
+# Aspeed SoC drivers
+#
+# end of Aspeed SoC drivers
 
 #
 # Broadcom SoC drivers
 #
 # CONFIG_SOC_BRCMSTB is not set
+# end of Broadcom SoC drivers
 
 #
 # NXP/Freescale QorIQ SoC drivers
 #
+# end of NXP/Freescale QorIQ SoC drivers
 
 #
 # i.MX SoC drivers
 #
+# end of i.MX SoC drivers
+
+#
+# IXP4xx SoC drivers
+#
+# CONFIG_IXP4XX_QMGR is not set
+# CONFIG_IXP4XX_NPE is not set
+# end of IXP4xx SoC drivers
 
 #
 # Qualcomm SoC drivers
 #
+# end of Qualcomm SoC drivers
+
 CONFIG_ROCKCHIP_GRF=y
 CONFIG_ROCKCHIP_PM_DOMAINS=y
 # CONFIG_SOC_TI is not set
@@ -3350,21 +4362,29 @@ CONFIG_ROCKCHIP_PM_DOMAINS=y
 # Xilinx SoC drivers
 #
 # CONFIG_XILINX_VCU is not set
-# CONFIG_PM_DEVFREQ is not set
-CONFIG_EXTCON=y
+# end of Xilinx SoC drivers
+# end of SOC (System On Chip) specific Drivers
+
+CONFIG_PM_DEVFREQ=y
 
 #
-# Extcon Device Drivers
+# DEVFREQ Governors
 #
-# CONFIG_EXTCON_ADC_JACK is not set
-# CONFIG_EXTCON_GPIO is not set
-# CONFIG_EXTCON_MAX3355 is not set
-# CONFIG_EXTCON_PALMAS is not set
-# CONFIG_EXTCON_RT8973A is not set
-# CONFIG_EXTCON_SM5502 is not set
-# CONFIG_EXTCON_USB_GPIO is not set
-# CONFIG_EXTCON_USBC_CROS_EC is not set
-# CONFIG_MEMORY is not set
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+# CONFIG_DEVFREQ_GOV_PASSIVE is not set
+
+#
+# DEVFREQ Drivers
+#
+# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
+# CONFIG_PM_DEVFREQ_EVENT is not set
+# CONFIG_EXTCON is not set
+CONFIG_MEMORY=y
+# CONFIG_ARM_PL172_MPMC is not set
+CONFIG_PL353_SMC=y
 CONFIG_IIO=y
 CONFIG_IIO_BUFFER=y
 # CONFIG_IIO_BUFFER_CB is not set
@@ -3384,6 +4404,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_ADIS16209 is not set
 # CONFIG_ADXL345_I2C is not set
 # CONFIG_ADXL345_SPI is not set
+# CONFIG_ADXL372_SPI is not set
+# CONFIG_ADXL372_I2C is not set
 # CONFIG_BMA180 is not set
 # CONFIG_BMA220 is not set
 # CONFIG_BMC150_ACCEL is not set
@@ -3392,7 +4414,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_DMARD06 is not set
 # CONFIG_DMARD09 is not set
 # CONFIG_DMARD10 is not set
-# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
+CONFIG_IIO_CROS_EC_ACCEL_LEGACY=y
 # CONFIG_IIO_ST_ACCEL_3AXIS is not set
 # CONFIG_KXSD9 is not set
 # CONFIG_KXCJK1013 is not set
@@ -3408,22 +4430,27 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_SCA3000 is not set
 # CONFIG_STK8312 is not set
 # CONFIG_STK8BA50 is not set
+# end of Accelerometers
 
 #
 # Analog to digital converters
 #
+# CONFIG_AD7124 is not set
 # CONFIG_AD7266 is not set
 # CONFIG_AD7291 is not set
 # CONFIG_AD7298 is not set
 # CONFIG_AD7476 is not set
+# CONFIG_AD7606_IFACE_PARALLEL is not set
+# CONFIG_AD7606_IFACE_SPI is not set
 # CONFIG_AD7766 is not set
+# CONFIG_AD7768_1 is not set
+# CONFIG_AD7780 is not set
 # CONFIG_AD7791 is not set
 # CONFIG_AD7793 is not set
 # CONFIG_AD7887 is not set
 # CONFIG_AD7923 is not set
+# CONFIG_AD7949 is not set
 # CONFIG_AD799X is not set
-# CONFIG_AXP20X_ADC is not set
-# CONFIG_AXP288_ADC is not set
 # CONFIG_CC10001_ADC is not set
 # CONFIG_ENVELOPE_DETECTOR is not set
 # CONFIG_HI8435 is not set
@@ -3439,10 +4466,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_MAX9611 is not set
 # CONFIG_MCP320X is not set
 # CONFIG_MCP3422 is not set
+# CONFIG_MCP3911 is not set
 # CONFIG_NAU7802 is not set
-# CONFIG_PALMAS_GPADC is not set
 CONFIG_ROCKCHIP_SARADC=y
-CONFIG_SD_ADC_MODULATOR=y
+# CONFIG_SD_ADC_MODULATOR is not set
 # CONFIG_TI_ADC081C is not set
 # CONFIG_TI_ADC0832 is not set
 # CONFIG_TI_ADC084S021 is not set
@@ -3452,21 +4479,24 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_TI_ADC161S626 is not set
 # CONFIG_TI_ADS1015 is not set
 # CONFIG_TI_ADS7950 is not set
+# CONFIG_TI_ADS8344 is not set
 # CONFIG_TI_ADS8688 is not set
+# CONFIG_TI_ADS124S08 is not set
 # CONFIG_TI_TLC4541 is not set
-# CONFIG_TWL4030_MADC is not set
-# CONFIG_TWL6030_GPADC is not set
 # CONFIG_VF610_ADC is not set
+# end of Analog to digital converters
 
 #
 # Analog Front Ends
 #
 # CONFIG_IIO_RESCALE is not set
+# end of Analog Front Ends
 
 #
 # Amplifiers
 #
 # CONFIG_AD8366 is not set
+# end of Amplifiers
 
 #
 # Chemical Sensors
@@ -3475,21 +4505,24 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_BME680 is not set
 # CONFIG_CCS811 is not set
 # CONFIG_IAQCORE is not set
+# CONFIG_SENSIRION_SGP30 is not set
+# CONFIG_SPS30 is not set
 # CONFIG_VZ89X is not set
-# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set
+# end of Chemical Sensors
+
+CONFIG_IIO_CROS_EC_SENSORS_CORE=y
+# CONFIG_IIO_CROS_EC_SENSORS is not set
 
 #
 # Hid Sensor IIO Common
 #
+# end of Hid Sensor IIO Common
 
 #
 # SSP Sensor Common
 #
 # CONFIG_IIO_SSP_SENSORHUB is not set
-
-#
-# Counters
-#
+# end of SSP Sensor Common
 
 #
 # Digital to analog converters
@@ -3504,6 +4537,7 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_AD5593R is not set
 # CONFIG_AD5504 is not set
 # CONFIG_AD5624R_SPI is not set
+# CONFIG_LTC1660 is not set
 # CONFIG_LTC2632 is not set
 # CONFIG_AD5686_SPI is not set
 # CONFIG_AD5696_I2C is not set
@@ -3523,11 +4557,15 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_MCP4922 is not set
 # CONFIG_TI_DAC082S085 is not set
 # CONFIG_TI_DAC5571 is not set
+# CONFIG_TI_DAC7311 is not set
+# CONFIG_TI_DAC7612 is not set
 # CONFIG_VF610_DAC is not set
+# end of Digital to analog converters
 
 #
 # IIO dummy driver
 #
+# end of IIO dummy driver
 
 #
 # Frequency Synthesizers DDS/PLL
@@ -3537,11 +4575,14 @@ CONFIG_SD_ADC_MODULATOR=y
 # Clock Generator/Distribution
 #
 # CONFIG_AD9523 is not set
+# end of Clock Generator/Distribution
 
 #
 # Phase-Locked Loop (PLL) frequency synthesizers
 #
 # CONFIG_ADF4350 is not set
+# end of Phase-Locked Loop (PLL) frequency synthesizers
+# end of Frequency Synthesizers DDS/PLL
 
 #
 # Digital gyroscope sensors
@@ -3552,9 +4593,11 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_ADIS16260 is not set
 # CONFIG_ADXRS450 is not set
 # CONFIG_BMG160 is not set
+# CONFIG_FXAS21002C is not set
 # CONFIG_MPU3050_I2C is not set
 # CONFIG_IIO_ST_GYRO_3AXIS is not set
 # CONFIG_ITG3200 is not set
+# end of Digital gyroscope sensors
 
 #
 # Health Sensors
@@ -3567,6 +4610,8 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_AFE4404 is not set
 # CONFIG_MAX30100 is not set
 # CONFIG_MAX30102 is not set
+# end of Heart Rate Monitors
+# end of Health Sensors
 
 #
 # Humidity sensors
@@ -3578,6 +4623,7 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_HTU21 is not set
 # CONFIG_SI7005 is not set
 # CONFIG_SI7020 is not set
+# end of Humidity sensors
 
 #
 # Inertial measurement units
@@ -3590,6 +4636,7 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_INV_MPU6050_I2C is not set
 # CONFIG_INV_MPU6050_SPI is not set
 # CONFIG_IIO_ST_LSM6DSX is not set
+# end of Inertial measurement units
 
 #
 # Light sensors
@@ -3605,8 +4652,9 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_CM3323 is not set
 # CONFIG_CM3605 is not set
 # CONFIG_CM36651 is not set
+# CONFIG_IIO_CROS_EC_LIGHT_PROX is not set
 # CONFIG_GP2AP020A00F is not set
-# CONFIG_SENSORS_ISL29018 is not set
+CONFIG_SENSORS_ISL29018=y
 # CONFIG_SENSORS_ISL29028 is not set
 # CONFIG_ISL29125 is not set
 # CONFIG_JSA1212 is not set
@@ -3614,6 +4662,7 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_LTR501 is not set
 # CONFIG_LV0104CS is not set
 # CONFIG_MAX44000 is not set
+# CONFIG_MAX44009 is not set
 # CONFIG_OPT3001 is not set
 # CONFIG_PA12203001 is not set
 # CONFIG_SI1133 is not set
@@ -3622,15 +4671,17 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_ST_UVIS25 is not set
 # CONFIG_TCS3414 is not set
 # CONFIG_TCS3472 is not set
-# CONFIG_SENSORS_TSL2563 is not set
-# CONFIG_TSL2583 is not set
+CONFIG_SENSORS_TSL2563=y
+CONFIG_TSL2583=y
 # CONFIG_TSL2772 is not set
 # CONFIG_TSL4531 is not set
 # CONFIG_US5182D is not set
 # CONFIG_VCNL4000 is not set
+# CONFIG_VCNL4035 is not set
 # CONFIG_VEML6070 is not set
 # CONFIG_VL6180 is not set
 # CONFIG_ZOPT2201 is not set
+# end of Light sensors
 
 #
 # Magnetometer sensors
@@ -3645,21 +4696,27 @@ CONFIG_SD_ADC_MODULATOR=y
 # CONFIG_IIO_ST_MAGN_3AXIS is not set
 # CONFIG_SENSORS_HMC5843_I2C is not set
 # CONFIG_SENSORS_HMC5843_SPI is not set
+# CONFIG_SENSORS_RM3100_I2C is not set
+# CONFIG_SENSORS_RM3100_SPI is not set
+# end of Magnetometer sensors
 
 #
 # Multiplexers
 #
 # CONFIG_IIO_MUX is not set
+# end of Multiplexers
 
 #
 # Inclinometer sensors
 #
+# end of Inclinometer sensors
 
 #
 # Triggers - standalone
 #
 # CONFIG_IIO_INTERRUPT_TRIGGER is not set
 CONFIG_IIO_SYSFS_TRIGGER=y
+# end of Triggers - standalone
 
 #
 # Digital potentiometers
@@ -3671,18 +4728,22 @@ CONFIG_IIO_SYSFS_TRIGGER=y
 # CONFIG_MCP4018 is not set
 # CONFIG_MCP4131 is not set
 # CONFIG_MCP4531 is not set
+# CONFIG_MCP41010 is not set
 # CONFIG_TPL0102 is not set
+# end of Digital potentiometers
 
 #
 # Digital potentiostats
 #
 # CONFIG_LMP91000 is not set
+# end of Digital potentiostats
 
 #
 # Pressure sensors
 #
 # CONFIG_ABP060MG is not set
 # CONFIG_BMP280 is not set
+# CONFIG_IIO_CROS_EC_BARO is not set
 # CONFIG_HP03 is not set
 # CONFIG_MPL115_I2C is not set
 # CONFIG_MPL115_SPI is not set
@@ -3693,26 +4754,33 @@ CONFIG_IIO_SYSFS_TRIGGER=y
 # CONFIG_T5403 is not set
 # CONFIG_HP206C is not set
 # CONFIG_ZPA2326 is not set
+# end of Pressure sensors
 
 #
 # Lightning sensors
 #
 # CONFIG_AS3935 is not set
+# end of Lightning sensors
 
 #
 # Proximity and distance sensors
 #
 # CONFIG_ISL29501 is not set
 # CONFIG_LIDAR_LITE_V2 is not set
+# CONFIG_MB1232 is not set
 # CONFIG_RFD77402 is not set
 # CONFIG_SRF04 is not set
 # CONFIG_SX9500 is not set
 # CONFIG_SRF08 is not set
+# CONFIG_VL53L0X_I2C is not set
+# end of Proximity and distance sensors
 
 #
 # Resolver to digital converters
 #
+# CONFIG_AD2S90 is not set
 # CONFIG_AD2S1200 is not set
+# end of Resolver to digital converters
 
 #
 # Temperature sensors
@@ -3724,16 +4792,15 @@ CONFIG_IIO_SYSFS_TRIGGER=y
 # CONFIG_TMP007 is not set
 # CONFIG_TSYS01 is not set
 # CONFIG_TSYS02D is not set
-# CONFIG_NTB is not set
-# CONFIG_VME_BUS is not set
+# CONFIG_MAX31856 is not set
+# end of Temperature sensors
+
 CONFIG_PWM=y
 CONFIG_PWM_SYSFS=y
-CONFIG_PWM_CROS_EC=y
+# CONFIG_PWM_CROS_EC is not set
 # CONFIG_PWM_FSL_FTM is not set
 # CONFIG_PWM_PCA9685 is not set
 CONFIG_PWM_ROCKCHIP=y
-# CONFIG_PWM_TWL is not set
-# CONFIG_PWM_TWL_LED is not set
 
 #
 # IRQ chip support
@@ -3741,6 +4808,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_IRQCHIP=y
 CONFIG_ARM_GIC=y
 CONFIG_ARM_GIC_MAX_NR=1
+# end of IRQ chip support
+
 # CONFIG_IPACK_BUS is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
 CONFIG_RESET_CONTROLLER=y
@@ -3752,46 +4821,74 @@ CONFIG_RESET_CONTROLLER=y
 #
 CONFIG_GENERIC_PHY=y
 # CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
 # CONFIG_PHY_PXA_28NM_HSIC is not set
 # CONFIG_PHY_PXA_28NM_USB2 is not set
 # CONFIG_PHY_CPCAP_USB is not set
 # CONFIG_PHY_MAPPHONE_MDM6600 is not set
+# CONFIG_PHY_OCELOT_SERDES is not set
 CONFIG_PHY_ROCKCHIP_DP=y
-CONFIG_PHY_ROCKCHIP_EMMC=y
-# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
+# CONFIG_PHY_ROCKCHIP_EMMC is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 # CONFIG_PHY_ROCKCHIP_PCIE is not set
 # CONFIG_PHY_ROCKCHIP_TYPEC is not set
 CONFIG_PHY_ROCKCHIP_USB=y
 # CONFIG_PHY_SAMSUNG_USB2 is not set
+# end of PHY Subsystem
+
 # CONFIG_POWERCAP is not set
 # CONFIG_MCB is not set
-CONFIG_RAS=y
+
+#
+# Performance monitor support
+#
+# CONFIG_ARM_CCI_PMU is not set
+# CONFIG_ARM_CCN is not set
+CONFIG_ARM_PMU=y
+# end of Performance monitor support
+
+# CONFIG_RAS is not set
 
 #
 # Android
 #
-# CONFIG_ANDROID is not set
-# CONFIG_LIBNVDIMM is not set
-# CONFIG_DAX is not set
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+# CONFIG_ANDROID_BINDERFS is not set
+CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder"
+# CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set
+# end of Android
+
+CONFIG_DAX=y
 CONFIG_NVMEM=y
-CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_NVMEM_SYSFS=y
+# CONFIG_ROCKCHIP_EFUSE is not set
 
 #
 # HW tracing support
 #
 # CONFIG_STM is not set
 # CONFIG_INTEL_TH is not set
+# end of HW tracing support
+
 # CONFIG_FPGA is not set
 # CONFIG_FSI is not set
 # CONFIG_TEE is not set
 CONFIG_PM_OPP=y
 # CONFIG_SIOX is not set
 # CONFIG_SLIMBUS is not set
+# CONFIG_INTERCONNECT is not set
+# CONFIG_COUNTER is not set
+# end of Device Drivers
 
 #
 # File systems
 #
 CONFIG_DCACHE_WORD_ACCESS=y
+# CONFIG_VALIDATE_FS_PARSER is not set
 CONFIG_FS_IOMAP=y
 # CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
@@ -3799,29 +4896,16 @@ CONFIG_EXT4_FS=y
 CONFIG_EXT4_USE_FOR_EXT2=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
-# CONFIG_EXT4_ENCRYPTION is not set
 # CONFIG_EXT4_DEBUG is not set
 CONFIG_JBD2=y
 # CONFIG_JBD2_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-CONFIG_XFS_FS=m
-# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_POSIX_ACL is not set
-# CONFIG_XFS_RT is not set
-# CONFIG_XFS_ONLINE_SCRUB is not set
-# CONFIG_XFS_WARN is not set
-# CONFIG_XFS_DEBUG is not set
+# CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-CONFIG_BTRFS_FS=m
-CONFIG_BTRFS_FS_POSIX_ACL=y
-# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
-# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
-# CONFIG_BTRFS_DEBUG is not set
-# CONFIG_BTRFS_ASSERT is not set
-# CONFIG_BTRFS_FS_REF_VERIFY is not set
+# CONFIG_BTRFS_FS is not set
 # CONFIG_NILFS2_FS is not set
 # CONFIG_F2FS_FS is not set
 CONFIG_FS_POSIX_ACL=y
@@ -3834,37 +4918,35 @@ CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY_USER=y
 CONFIG_FANOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS4_FS=m
-CONFIG_AUTOFS_FS=y
-CONFIG_FUSE_FS=m
+# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QUOTA_DEBUG is not set
+CONFIG_QUOTA_TREE=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_FUSE_FS=y
 # CONFIG_CUSE is not set
-CONFIG_OVERLAY_FS=m
-# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
-CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
-# CONFIG_OVERLAY_FS_INDEX is not set
-# CONFIG_OVERLAY_FS_XINO_AUTO is not set
-# CONFIG_OVERLAY_FS_METACOPY is not set
+# CONFIG_OVERLAY_FS is not set
 
 #
 # Caches
 #
-CONFIG_FSCACHE=y
-# CONFIG_FSCACHE_STATS is not set
-# CONFIG_FSCACHE_HISTOGRAM is not set
-# CONFIG_FSCACHE_DEBUG is not set
-# CONFIG_FSCACHE_OBJECT_LIST is not set
-CONFIG_CACHEFILES=y
-# CONFIG_CACHEFILES_DEBUG is not set
-# CONFIG_CACHEFILES_HISTOGRAM is not set
+# CONFIG_FSCACHE is not set
+# end of Caches
 
 #
 # CD-ROM/DVD Filesystems
 #
-CONFIG_ISO9660_FS=m
+CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
 CONFIG_ZISOFS=y
-CONFIG_UDF_FS=m
+CONFIG_UDF_FS=y
+# end of CD-ROM/DVD Filesystems
 
 #
 # DOS/FAT/NT Filesystems
@@ -3872,12 +4954,11 @@ CONFIG_UDF_FS=m
 CONFIG_FAT_FS=y
 # CONFIG_MSDOS_FS is not set
 CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=850
-CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
-CONFIG_FAT_DEFAULT_UTF8=y
-CONFIG_NTFS_FS=y
-# CONFIG_NTFS_DEBUG is not set
-CONFIG_NTFS_RW=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
+# CONFIG_NTFS_FS is not set
+# end of DOS/FAT/NT Filesystems
 
 #
 # Pseudo filesystems
@@ -3891,9 +4972,10 @@ CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_TMPFS_XATTR=y
-# CONFIG_HUGETLBFS is not set
 CONFIG_MEMFD_CREATE=y
 CONFIG_CONFIGFS_FS=y
+# end of Pseudo filesystems
+
 CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ORANGEFS_FS is not set
 # CONFIG_ADFS_FS is not set
@@ -3901,24 +4983,25 @@ CONFIG_MISC_FILESYSTEMS=y
 CONFIG_ECRYPT_FS=y
 # CONFIG_ECRYPT_FS_MESSAGING is not set
 # CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
+CONFIG_HFSPLUS_FS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
-CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS=y
 # CONFIG_SQUASHFS_FILE_CACHE is not set
 CONFIG_SQUASHFS_FILE_DIRECT=y
-# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
+CONFIG_SQUASHFS_DECOMP_SINGLE=y
 # CONFIG_SQUASHFS_DECOMP_MULTI is not set
-CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
-# CONFIG_SQUASHFS_XATTR is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
+CONFIG_SQUASHFS_XATTR=y
 CONFIG_SQUASHFS_ZLIB=y
 # CONFIG_SQUASHFS_LZ4 is not set
-# CONFIG_SQUASHFS_LZO is not set
+CONFIG_SQUASHFS_LZO=y
 # CONFIG_SQUASHFS_XZ is not set
 # CONFIG_SQUASHFS_ZSTD is not set
-# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
 # CONFIG_SQUASHFS_EMBEDDED is not set
 CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
 # CONFIG_VXFS_FS is not set
@@ -3928,16 +5011,50 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX6FS_FS is not set
 # CONFIG_ROMFS_FS is not set
-# CONFIG_PSTORE is not set
+CONFIG_PSTORE=y
+CONFIG_PSTORE_DEFLATE_COMPRESS=y
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
+# CONFIG_PSTORE_842_COMPRESS is not set
+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
+CONFIG_PSTORE_COMPRESS=y
+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
+CONFIG_PSTORE_CONSOLE=y
+# CONFIG_PSTORE_PMSG is not set
+# CONFIG_PSTORE_FTRACE is not set
+CONFIG_PSTORE_RAM=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V4_1 is not set
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_GRACE_PERIOD=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="utf8"
 CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
-CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_850 is not set
 # CONFIG_NLS_CODEPAGE_852 is not set
 # CONFIG_NLS_CODEPAGE_855 is not set
 # CONFIG_NLS_CODEPAGE_857 is not set
@@ -3957,7 +5074,7 @@ CONFIG_NLS_CODEPAGE_850=y
 # CONFIG_NLS_ISO8859_8 is not set
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
@@ -3984,6 +5101,8 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_MAC_TURKISH is not set
 CONFIG_NLS_UTF8=y
 # CONFIG_DLM is not set
+# CONFIG_UNICODE is not set
+# end of File systems
 
 #
 # Security options
@@ -3992,18 +5111,56 @@ CONFIG_KEYS=y
 # CONFIG_PERSISTENT_KEYRINGS is not set
 # CONFIG_BIG_KEYS is not set
 # CONFIG_TRUSTED_KEYS is not set
-# CONFIG_ENCRYPTED_KEYS is not set
+CONFIG_ENCRYPTED_KEYS=y
 # CONFIG_KEY_DH_OPERATIONS is not set
 # CONFIG_SECURITY_DMESG_RESTRICT is not set
-# CONFIG_SECURITY is not set
+CONFIG_SECURITY=y
 CONFIG_SECURITYFS=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+CONFIG_SECURITY_PATH=y
+CONFIG_LSM_MMAP_MIN_ADDR=32768
 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
-# CONFIG_HARDENED_USERCOPY is not set
+CONFIG_HARDENED_USERCOPY=y
+CONFIG_HARDENED_USERCOPY_FALLBACK=y
+# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
 # CONFIG_FORTIFY_SOURCE is not set
-# CONFIG_STATIC_USERMODEHELPER is not set
-CONFIG_DEFAULT_SECURITY_DAC=y
-CONFIG_DEFAULT_SECURITY=""
-CONFIG_XOR_BLOCKS=m
+CONFIG_STATIC_USERMODEHELPER=y
+CONFIG_STATIC_USERMODEHELPER_PATH="/sbin/usermode-helper"
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+# CONFIG_SECURITY_SELINUX_DISABLE is not set
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_APPARMOR is not set
+CONFIG_SECURITY_LOADPIN=y
+# CONFIG_SECURITY_LOADPIN_ENFORCE is not set
+CONFIG_SECURITY_YAMA=y
+CONFIG_SECURITY_SAFESETID=y
+CONFIG_INTEGRITY=y
+# CONFIG_INTEGRITY_SIGNATURE is not set
+CONFIG_INTEGRITY_AUDIT=y
+# CONFIG_IMA is not set
+# CONFIG_EVM is not set
+CONFIG_DEFAULT_SECURITY_SELINUX=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor"
+
+#
+# Kernel hardening options
+#
+
+#
+# Memory initialization
+#
+CONFIG_INIT_STACK_NONE=y
+# end of Memory initialization
+# end of Kernel hardening options
+# end of Security options
+
 CONFIG_CRYPTO=y
 
 #
@@ -4025,23 +5182,28 @@ CONFIG_CRYPTO_AKCIPHER=y
 CONFIG_CRYPTO_KPP2=y
 CONFIG_CRYPTO_KPP=y
 CONFIG_CRYPTO_ACOMP2=y
-CONFIG_CRYPTO_RSA=y
-# CONFIG_CRYPTO_DH is not set
-CONFIG_CRYPTO_ECDH=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_USER is not set
-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
 CONFIG_CRYPTO_GF128MUL=y
 CONFIG_CRYPTO_NULL=y
 CONFIG_CRYPTO_NULL2=y
 # CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
-# CONFIG_CRYPTO_CRYPTD is not set
-# CONFIG_CRYPTO_MCRYPTD is not set
-# CONFIG_CRYPTO_AUTHENC is not set
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_AUTHENC=y
 # CONFIG_CRYPTO_TEST is not set
-CONFIG_CRYPTO_ENGINE=m
+CONFIG_CRYPTO_SIMD=y
+
+#
+# Public-key cryptography
+#
+CONFIG_CRYPTO_RSA=y
+# CONFIG_CRYPTO_DH is not set
+CONFIG_CRYPTO_ECC=y
+CONFIG_CRYPTO_ECDH=y
+# CONFIG_CRYPTO_ECRDSA is not set
 
 #
 # Authenticated Encryption with Associated Data
@@ -4055,7 +5217,7 @@ CONFIG_CRYPTO_GCM=y
 # CONFIG_CRYPTO_MORUS640 is not set
 # CONFIG_CRYPTO_MORUS1280 is not set
 CONFIG_CRYPTO_SEQIV=y
-# CONFIG_CRYPTO_ECHAINIV is not set
+CONFIG_CRYPTO_ECHAINIV=y
 
 #
 # Block modes
@@ -4066,9 +5228,11 @@ CONFIG_CRYPTO_CTR=y
 # CONFIG_CRYPTO_CTS is not set
 CONFIG_CRYPTO_ECB=y
 # CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_OFB is not set
 # CONFIG_CRYPTO_PCBC is not set
-CONFIG_CRYPTO_XTS=y
+# CONFIG_CRYPTO_XTS is not set
 # CONFIG_CRYPTO_KEYWRAP is not set
+# CONFIG_CRYPTO_ADIANTUM is not set
 
 #
 # Hash modes
@@ -4088,16 +5252,17 @@ CONFIG_CRYPTO_GHASH=y
 # CONFIG_CRYPTO_POLY1305 is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
+CONFIG_CRYPTO_MICHAEL_MIC=y
 # CONFIG_CRYPTO_RMD128 is not set
 # CONFIG_CRYPTO_RMD160 is not set
 # CONFIG_CRYPTO_RMD256 is not set
 # CONFIG_CRYPTO_RMD320 is not set
 CONFIG_CRYPTO_SHA1=y
 CONFIG_CRYPTO_SHA256=y
-# CONFIG_CRYPTO_SHA512 is not set
+CONFIG_CRYPTO_SHA512=y
 # CONFIG_CRYPTO_SHA3 is not set
 # CONFIG_CRYPTO_SM3 is not set
+# CONFIG_CRYPTO_STREEBOG is not set
 # CONFIG_CRYPTO_TGR192 is not set
 # CONFIG_CRYPTO_WP512 is not set
 
@@ -4129,7 +5294,7 @@ CONFIG_CRYPTO_DES=y
 CONFIG_CRYPTO_DEFLATE=y
 CONFIG_CRYPTO_LZO=y
 # CONFIG_CRYPTO_842 is not set
-CONFIG_CRYPTO_LZ4=y
+# CONFIG_CRYPTO_LZ4 is not set
 # CONFIG_CRYPTO_LZ4HC is not set
 # CONFIG_CRYPTO_ZSTD is not set
 
@@ -4143,18 +5308,19 @@ CONFIG_CRYPTO_DRBG_HMAC=y
 # CONFIG_CRYPTO_DRBG_CTR is not set
 CONFIG_CRYPTO_DRBG=y
 CONFIG_CRYPTO_JITTERENTROPY=y
-# CONFIG_CRYPTO_USER_API_HASH is not set
-# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_USER_API=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
 # CONFIG_CRYPTO_USER_API_RNG is not set
 # CONFIG_CRYPTO_USER_API_AEAD is not set
 CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_DEV_ROCKCHIP=y
-CONFIG_CRYPTO_DEV_VIRTIO=m
+# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
 # CONFIG_CRYPTO_DEV_CCREE is not set
 CONFIG_ASYMMETRIC_KEY_TYPE=y
 CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
 CONFIG_X509_CERTIFICATE_PARSER=y
+# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
 CONFIG_PKCS7_MESSAGE_PARSER=y
 # CONFIG_PKCS7_TEST_KEY is not set
 # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
@@ -4167,21 +5333,24 @@ CONFIG_SYSTEM_TRUSTED_KEYS=""
 # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
 # CONFIG_SECONDARY_TRUSTED_KEYRING is not set
 # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
+# end of Certificates for signature checking
+
 CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
 #
-CONFIG_RAID6_PQ=m
+# CONFIG_PACKING is not set
 CONFIG_BITREVERSE=y
 CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_RATIONAL=y
 CONFIG_GENERIC_STRNCPY_FROM_USER=y
 CONFIG_GENERIC_STRNLEN_USER=y
 CONFIG_GENERIC_NET_UTILS=y
+# CONFIG_CORDIC is not set
+CONFIG_RATIONAL=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
 CONFIG_CRC_T10DIF=y
 CONFIG_CRC_ITU_T=y
@@ -4196,16 +5365,12 @@ CONFIG_CRC32_SLICEBY8=y
 CONFIG_CRC7=y
 CONFIG_LIBCRC32C=y
 # CONFIG_CRC8 is not set
-CONFIG_XXHASH=m
+CONFIG_AUDIT_GENERIC=y
 # CONFIG_RANDOM32_SELFTEST is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_LZO_DECOMPRESS=y
-CONFIG_LZ4_COMPRESS=y
-CONFIG_LZ4_DECOMPRESS=y
-CONFIG_ZSTD_COMPRESS=m
-CONFIG_ZSTD_DECOMPRESS=m
 CONFIG_XZ_DEC=y
 # CONFIG_XZ_DEC_X86 is not set
 # CONFIG_XZ_DEC_POWERPC is not set
@@ -4215,16 +5380,27 @@ CONFIG_XZ_DEC_ARMTHUMB=y
 # CONFIG_XZ_DEC_SPARC is not set
 CONFIG_XZ_DEC_BCJ=y
 # CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_XZ=y
 CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_RADIX_TREE_MULTIORDER=y
+CONFIG_REED_SOLOMON=y
+CONFIG_REED_SOLOMON_ENC8=y
+CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=y
+CONFIG_TEXTSEARCH_BM=y
+CONFIG_TEXTSEARCH_FSM=y
 CONFIG_ASSOCIATIVE_ARRAY=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HAS_DMA=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_ARCH_DMA_ADDR_T_64BIT=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_DMA_DECLARE_COHERENT=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_DMA_REMAP=y
+# CONFIG_DMA_API_DEBUG is not set
 CONFIG_SGL_ALLOC=y
 CONFIG_CPU_RMAP=y
 CONFIG_DQL=y
@@ -4232,9 +5408,8 @@ CONFIG_GLOB=y
 # CONFIG_GLOB_SELFTEST is not set
 CONFIG_NLATTR=y
 CONFIG_CLZ_TAB=y
-# CONFIG_CORDIC is not set
-CONFIG_DDR=y
-CONFIG_IRQ_POLL=y
+# CONFIG_DDR is not set
+# CONFIG_IRQ_POLL is not set
 CONFIG_MPILIB=y
 CONFIG_LIBFDT=y
 CONFIG_OID_REGISTRY=y
@@ -4243,9 +5418,9 @@ CONFIG_FONT_SUPPORT=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
 CONFIG_SG_POOL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
 CONFIG_SBITMAP=y
 # CONFIG_STRING_SELFTEST is not set
+# end of Library routines
 
 #
 # Kernel hacking
@@ -4255,11 +5430,13 @@ CONFIG_SBITMAP=y
 # printk and dmesg options
 #
 CONFIG_PRINTK_TIME=y
-CONFIG_CONSOLE_LOGLEVEL_DEFAULT=8
+# CONFIG_PRINTK_CALLER is not set
+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
 CONFIG_CONSOLE_LOGLEVEL_QUIET=4
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
 # CONFIG_BOOT_PRINTK_DELAY is not set
-CONFIG_DYNAMIC_DEBUG=y
+# CONFIG_DYNAMIC_DEBUG is not set
+# end of printk and dmesg options
 
 #
 # Compile-time checks and compiler options
@@ -4268,33 +5445,40 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_INFO_REDUCED is not set
 # CONFIG_DEBUG_INFO_SPLIT is not set
 # CONFIG_DEBUG_INFO_DWARF4 is not set
+# CONFIG_DEBUG_INFO_BTF is not set
 # CONFIG_GDB_SCRIPTS is not set
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
-CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_READABLE_ASM is not set
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_PAGE_OWNER is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+# CONFIG_OPTIMIZE_INLINING is not set
 # CONFIG_DEBUG_SECTION_MISMATCH is not set
 # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# end of Compile-time checks and compiler options
+
 CONFIG_MAGIC_SYSRQ=y
-CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01b6
-# CONFIG_MAGIC_SYSRQ_SERIAL is not set
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
+CONFIG_MAGIC_SYSRQ_SERIAL=y
 CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_MISC=y
 
 #
 # Memory Debugging
 #
 # CONFIG_PAGE_EXTENSION is not set
 # CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_PAGE_OWNER is not set
 # CONFIG_PAGE_POISONING is not set
 # CONFIG_DEBUG_PAGE_REF is not set
 # CONFIG_DEBUG_RODATA_TEST is not set
 # CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
 # CONFIG_SLUB_STATS is not set
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 # CONFIG_DEBUG_KMEMLEAK is not set
@@ -4305,24 +5489,30 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 # CONFIG_DEBUG_HIGHMEM is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_KASAN_STACK=1
+# end of Memory Debugging
+
 CONFIG_ARCH_HAS_KCOV=y
+CONFIG_CC_HAS_SANCOV_TRACE_PC=y
+# CONFIG_KCOV is not set
 # CONFIG_DEBUG_SHIRQ is not set
 
 #
 # Debug Lockups and Hangs
 #
 # CONFIG_SOFTLOCKUP_DETECTOR is not set
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=300
-# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
-CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_DETECT_HUNG_TASK is not set
 # CONFIG_WQ_WATCHDOG is not set
-# CONFIG_PANIC_ON_OOPS is not set
-CONFIG_PANIC_ON_OOPS_VALUE=0
-CONFIG_PANIC_TIMEOUT=0
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_SCHEDSTATS is not set
-CONFIG_SCHED_STACK_END_CHECK=y
+# end of Debug Lockups and Hangs
+
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PANIC_ON_OOPS_VALUE=1
+CONFIG_PANIC_TIMEOUT=-1
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHED_INFO=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_SCHED_STACK_END_CHECK is not set
 # CONFIG_DEBUG_TIMEKEEPING is not set
 # CONFIG_DEBUG_PREEMPT is not set
 
@@ -4333,24 +5523,26 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
 # CONFIG_PROVE_LOCKING is not set
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_SPINLOCK=y
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
 # CONFIG_DEBUG_RWSEMS is not set
 # CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_LOCK_TORTURE_TEST is not set
 # CONFIG_WW_MUTEX_SELFTEST is not set
+# end of Lock Debugging (spinlocks, mutexes, etc...)
+
 CONFIG_STACKTRACE=y
 # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_PI_LIST is not set
+# CONFIG_DEBUG_PLIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
-# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_DEBUG_CREDENTIALS=y
 
 #
 # RCU Debugging
@@ -4360,6 +5552,8 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=21
 # CONFIG_RCU_TRACE is not set
 # CONFIG_RCU_EQS_DEBUG is not set
+# end of RCU Debugging
+
 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
@@ -4374,7 +5568,6 @@ CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_TRACER_MAX_TRACE=y
 CONFIG_TRACE_CLOCK=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
@@ -4390,15 +5583,17 @@ CONFIG_FUNCTION_GRAPH_TRACER=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_HWLAT_TRACER is not set
-CONFIG_FTRACE_SYSCALLS=y
-CONFIG_TRACER_SNAPSHOT=y
-# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
+# CONFIG_FTRACE_SYSCALLS is not set
+# CONFIG_TRACER_SNAPSHOT is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
 # CONFIG_PROFILE_ALL_BRANCHES is not set
-CONFIG_STACK_TRACER=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_KPROBE_EVENTS is not set
+# CONFIG_STACK_TRACER is not set
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_UPROBE_EVENTS=y
+CONFIG_BPF_EVENTS=y
+CONFIG_DYNAMIC_EVENTS=y
+CONFIG_PROBE_EVENTS=y
 CONFIG_DYNAMIC_FTRACE=y
 CONFIG_DYNAMIC_FTRACE_WITH_REGS=y
 # CONFIG_FUNCTION_PROFILER is not set
@@ -4409,25 +5604,57 @@ CONFIG_FTRACE_MCOUNT_RECORD=y
 # CONFIG_RING_BUFFER_STARTUP_TEST is not set
 # CONFIG_PREEMPTIRQ_DELAY_TEST is not set
 # CONFIG_TRACE_EVAL_MAP_FILE is not set
-CONFIG_TRACING_EVENTS_GPIO=y
-# CONFIG_DMA_API_DEBUG is not set
-# CONFIG_RUNTIME_TESTING_MENU is not set
+CONFIG_RUNTIME_TESTING_MENU=y
+CONFIG_LKDTM=y
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_TEST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_PERCPU_TEST is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_STRSCPY is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_BITFIELD is not set
+# CONFIG_TEST_UUID is not set
+# CONFIG_TEST_XARRAY is not set
+# CONFIG_TEST_OVERFLOW is not set
+# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_HASH is not set
+# CONFIG_TEST_IDA is not set
+CONFIG_TEST_LKM=m
+# CONFIG_TEST_VMALLOC is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_FIND_BIT_BENCHMARK is not set
+CONFIG_TEST_FIRMWARE=y
+# CONFIG_TEST_SYSCTL is not set
+CONFIG_TEST_UDELAY=y
+# CONFIG_TEST_STATIC_KEYS is not set
+# CONFIG_TEST_KMOD is not set
+# CONFIG_TEST_MEMCAT_P is not set
+# CONFIG_TEST_STACKINIT is not set
 # CONFIG_MEMTEST is not set
 # CONFIG_BUG_ON_DATA_CORRUPTION is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
 # CONFIG_UBSAN is not set
+CONFIG_UBSAN_ALIGNMENT=y
 CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
-# CONFIG_STRICT_DEVMEM is not set
+CONFIG_STRICT_DEVMEM=y
+# CONFIG_IO_STRICT_DEVMEM is not set
 # CONFIG_ARM_PTDUMP_DEBUGFS is not set
 # CONFIG_DEBUG_WX is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_OLD_MCOUNT=y
+CONFIG_UNWINDER_FRAME_POINTER=y
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_LL is not set
 CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
 CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-# CONFIG_ARM_KPROBES_TEST is not set
 # CONFIG_PID_IN_CONTEXTIDR is not set
 # CONFIG_CORESIGHT is not set
+# end of Kernel hacking
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0001-ARM-dts-rockchip-Fix-rk3288-rock2-vcc_flash-name.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0001-ARM-dts-rockchip-Fix-rk3288-rock2-vcc_flash-name.patch
deleted file mode 100644
index a0e9556..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0001-ARM-dts-rockchip-Fix-rk3288-rock2-vcc_flash-name.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 03d9f8fa2bfdc791865624d3adc29070cf67814e Mon Sep 17 00:00:00 2001
-From: John Keeping <john@metanate.com>
-Date: Tue, 13 Nov 2018 15:24:13 +0000
-Subject: [PATCH 01/54] ARM: dts: rockchip: Fix rk3288-rock2 vcc_flash name
-
-There is no functional change from this, but it is confusing to find two
-copies of vcc_sys and no vcc_flash when looking in
-/sys/class/regulator/*/name.
-
-Signed-off-by: John Keeping <john@metanate.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-index 50325489c0ce..32e1ab336662 100644
---- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-@@ -25,7 +25,7 @@
- 
- 	vcc_flash: flash-regulator {
- 		compatible = "regulator-fixed";
--		regulator-name = "vcc_sys";
-+		regulator-name = "vcc_flash";
- 		regulator-min-microvolt = <1800000>;
- 		regulator-max-microvolt = <1800000>;
- 		startup-delay-us = <150>;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0002-ARM-dts-rockchip-Add-all-CPUs-in-cooling-maps.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0002-ARM-dts-rockchip-Add-all-CPUs-in-cooling-maps.patch
deleted file mode 100644
index a2a56aa..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0002-ARM-dts-rockchip-Add-all-CPUs-in-cooling-maps.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From 99935bd4b5b4558beb069222e6d6143fe5830d64 Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Fri, 16 Nov 2018 15:31:13 +0530
-Subject: [PATCH 02/54] ARM: dts: rockchip: Add all CPUs in cooling maps
-
-Each CPU can (and does) participate in cooling down the system but the
-DT only captures a handful of them, normally CPU0, in the cooling maps.
-Things work by chance currently as under normal circumstances its the
-first CPU of each cluster which is used by the operating systems to
-probe the cooling devices. But as soon as this CPU ordering changes and
-any other CPU is used to bring up the cooling device, we will start
-seeing failures.
-
-Also the DT is rather incomplete when we list only one CPU in the
-cooling maps, as the hardware doesn't have any such limitations.
-
-Update cooling maps to include all devices affected by individual trip
-points.
-
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk322x.dtsi              | 10 ++++++++--
- arch/arm/boot/dts/rk3288-veyron-mickey.dts | 24 ++++++++++++++----------
- arch/arm/boot/dts/rk3288.dtsi              | 15 ++++++++++++---
- 3 files changed, 34 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
-index cd8f2a3b0e91..29f19076dceb 100644
---- a/arch/arm/boot/dts/rk322x.dtsi
-+++ b/arch/arm/boot/dts/rk322x.dtsi
-@@ -493,12 +493,18 @@
- 				map0 {
- 					trip = <&cpu_alert0>;
- 					cooling-device =
--						<&cpu0 THERMAL_NO_LIMIT 6>;
-+						<&cpu0 THERMAL_NO_LIMIT 6>,
-+						<&cpu1 THERMAL_NO_LIMIT 6>,
-+						<&cpu2 THERMAL_NO_LIMIT 6>,
-+						<&cpu3 THERMAL_NO_LIMIT 6>;
- 				};
- 				map1 {
- 					trip = <&cpu_alert1>;
- 					cooling-device =
--						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-+						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- 				};
- 			};
- 		};
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-index 1e0158acf895..d889ab3c8235 100644
---- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-@@ -81,8 +81,10 @@
- 		 */
- 		cpu_warm_limit_cpu {
- 			trip = <&cpu_alert_warm>;
--			cooling-device =
--				<&cpu0 THERMAL_NO_LIMIT 4>;
-+			cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
-+					 <&cpu1 THERMAL_NO_LIMIT 4>,
-+					 <&cpu2 THERMAL_NO_LIMIT 4>,
-+					 <&cpu3 THERMAL_NO_LIMIT 4>;
- 		};
- 
- 		/*
-@@ -103,23 +105,25 @@
- 		 */
- 		cpu_almost_hot_limit_cpu {
- 			trip = <&cpu_alert_almost_hot>;
--			cooling-device =
--				<&cpu0 5 6>;
-+			cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
-+					 <&cpu3 5 6>;
- 		};
- 		cpu_hot_limit_cpu {
- 			trip = <&cpu_alert_hot>;
--			cooling-device =
--				<&cpu0 7 7>;
-+			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
-+					 <&cpu3 7 7>;
- 		};
- 		cpu_hotter_limit_cpu {
- 			trip = <&cpu_alert_hotter>;
--			cooling-device =
--				<&cpu0 7 8>;
-+			cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
-+					 <&cpu3 7 8>;
- 		};
- 		cpu_very_hot_limit_cpu {
- 			trip = <&cpu_alert_very_hot>;
--			cooling-device =
--				<&cpu0 8 THERMAL_NO_LIMIT>;
-+			cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
-+					 <&cpu1 8 THERMAL_NO_LIMIT>,
-+					 <&cpu2 8 THERMAL_NO_LIMIT>,
-+					 <&cpu3 8 THERMAL_NO_LIMIT>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 0840ffb3205c..1da86e82bb57 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -508,12 +508,18 @@
- 				map0 {
- 					trip = <&cpu_alert0>;
- 					cooling-device =
--						<&cpu0 THERMAL_NO_LIMIT 6>;
-+						<&cpu0 THERMAL_NO_LIMIT 6>,
-+						<&cpu1 THERMAL_NO_LIMIT 6>,
-+						<&cpu2 THERMAL_NO_LIMIT 6>,
-+						<&cpu3 THERMAL_NO_LIMIT 6>;
- 				};
- 				map1 {
- 					trip = <&cpu_alert1>;
- 					cooling-device =
--						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-+						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- 				};
- 			};
- 		};
-@@ -541,7 +547,10 @@
- 				map0 {
- 					trip = <&gpu_alert0>;
- 					cooling-device =
--						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-+						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-+						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- 				};
- 			};
- 		};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0003-ARM-dts-rockchip-add-VPU-device-node-for-RK3288.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0003-ARM-dts-rockchip-add-VPU-device-node-for-RK3288.patch
deleted file mode 100644
index 9244927..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0003-ARM-dts-rockchip-add-VPU-device-node-for-RK3288.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From ad5399d12ca4f68fdb9e58e4b9a556eb997a9639 Mon Sep 17 00:00:00 2001
-From: Ezequiel Garcia <ezequiel@collabora.com>
-Date: Fri, 30 Nov 2018 14:34:31 -0300
-Subject: [PATCH 03/54] ARM: dts: rockchip: add VPU device node for RK3288
-
-Add the Video Processing Unit node for RK3288 SoC.
-
-Fix the VPU IOMMU node, which was disabled and lacking
-its power domain property.
-
-Reviewed-by: Tomasz Figa <tfiga@chromium.org>
-Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288.dtsi | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 1da86e82bb57..ca7d52daa8fb 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1232,6 +1232,18 @@
- 		};
- 	};
- 
-+	vpu: video-codec@ff9a0000 {
-+		compatible = "rockchip,rk3288-vpu";
-+		reg = <0x0 0xff9a0000 0x0 0x800>;
-+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "vepu", "vdpu";
-+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-+		clock-names = "aclk", "hclk";
-+		iommus = <&vpu_mmu>;
-+		power-domains = <&power RK3288_PD_VIDEO>;
-+	};
-+
- 	vpu_mmu: iommu@ff9a0800 {
- 		compatible = "rockchip,iommu";
- 		reg = <0x0 0xff9a0800 0x0 0x100>;
-@@ -1240,7 +1252,7 @@
- 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- 		clock-names = "aclk", "iface";
- 		#iommu-cells = <0>;
--		status = "disabled";
-+		power-domains = <&power RK3288_PD_VIDEO>;
- 	};
- 
- 	hevc_mmu: iommu@ff9c0440 {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0005-ARM-dts-rockchip-add-chosen-node-on-veyron-devices.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0005-ARM-dts-rockchip-add-chosen-node-on-veyron-devices.patch
deleted file mode 100644
index 991f0d5..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0005-ARM-dts-rockchip-add-chosen-node-on-veyron-devices.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 5aed37a5cdef6453eb3bf307574e19e547ca0432 Mon Sep 17 00:00:00 2001
-From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
-Date: Fri, 15 Feb 2019 12:51:50 +0100
-Subject: [PATCH 05/54] ARM: dts: rockchip: add chosen node on veyron devices
-
-In order to use earlycon, the stdout-path property needs to be set
-in the chosen node. All veyron devices use uart2 for debugging, so
-add it to the core veyron dtsi.
-
-Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index d8bf939a3aff..0bc2409f6903 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -10,6 +10,10 @@
- #include "rk3288.dtsi"
- 
- / {
-+	chosen {
-+		stdout-path = "serial2:115200n8";
-+	};
-+
- 	/*
- 	 * The default coreboot on veyron devices ignores memory@0 nodes
- 	 * and would instead create another memory node.
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0009-ARM-dts-rockchip-add-grf-reference-in-rk3288-tsadc-n.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0009-ARM-dts-rockchip-add-grf-reference-in-rk3288-tsadc-n.patch
deleted file mode 100644
index e18928e..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0009-ARM-dts-rockchip-add-grf-reference-in-rk3288-tsadc-n.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 494da92d56e45c88966fab4db2bed1a2f300c5f8 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Sun, 24 Feb 2019 21:52:00 +0000
-Subject: [PATCH 09/54] ARM: dts: rockchip: add grf reference in rk3288 tsadc
- node
-
-The following message can be seen during boot:
-
-  rockchip-thermal ff280000.tsadc: Missing rockchip,grf property
-
-Fix this by adding rockchip,grf property to tsadc node.
-
-The warning itself is not relevant on rk3288 right now, as the
-tsadc doesn't need to set GRF-values at this point and only newer
-variants do.
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index ca7d52daa8fb..b577f3e41811 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -569,6 +569,7 @@
- 		pinctrl-1 = <&otp_out>;
- 		pinctrl-2 = <&otp_gpio>;
- 		#thermal-sensor-cells = <1>;
-+		rockchip,grf = <&grf>;
- 		rockchip,hw-tshut-temp = <95000>;
- 		status = "disabled";
- 	};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0011-ARM-dts-rockchip-Fix-gic-efuse-sort-ordering-for-rk3.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0011-ARM-dts-rockchip-Fix-gic-efuse-sort-ordering-for-rk3.patch
deleted file mode 100644
index 316df0f..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0011-ARM-dts-rockchip-Fix-gic-efuse-sort-ordering-for-rk3.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From a2b2012eab25aad00a7dd587d1754115491e59eb Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Wed, 20 Mar 2019 13:13:59 -0700
-Subject: [PATCH 11/54] ARM: dts: rockchip: Fix gic/efuse sort ordering for
- rk3288
-
-It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288.dtsi | 26 +++++++++++++-------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index b577f3e41811..743a7d85daf7 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1379,19 +1379,6 @@
- 		reg = <0x0 0xffaf0080 0x0 0x20>;
- 	};
- 
--	gic: interrupt-controller@ffc01000 {
--		compatible = "arm,gic-400";
--		interrupt-controller;
--		#interrupt-cells = <3>;
--		#address-cells = <0>;
--
--		reg = <0x0 0xffc01000 0x0 0x1000>,
--		      <0x0 0xffc02000 0x0 0x2000>,
--		      <0x0 0xffc04000 0x0 0x2000>,
--		      <0x0 0xffc06000 0x0 0x2000>;
--		interrupts = <GIC_PPI 9 0xf04>;
--	};
--
- 	efuse: efuse@ffb40000 {
- 		compatible = "rockchip,rk3288-efuse";
- 		reg = <0x0 0xffb40000 0x0 0x20>;
-@@ -1405,6 +1392,19 @@
- 		};
- 	};
- 
-+	gic: interrupt-controller@ffc01000 {
-+		compatible = "arm,gic-400";
-+		interrupt-controller;
-+		#interrupt-cells = <3>;
-+		#address-cells = <0>;
-+
-+		reg = <0x0 0xffc01000 0x0 0x1000>,
-+		      <0x0 0xffc02000 0x0 0x2000>,
-+		      <0x0 0xffc04000 0x0 0x2000>,
-+		      <0x0 0xffc06000 0x0 0x2000>;
-+		interrupts = <GIC_PPI 9 0xf04>;
-+	};
-+
- 	pinctrl: pinctrl {
- 		compatible = "rockchip,rk3288-pinctrl";
- 		rockchip,grf = <&grf>;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0012-ARM-dts-rockchip-Add-rk3288-veyron-jerry-rev-10-15.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0012-ARM-dts-rockchip-Add-rk3288-veyron-jerry-rev-10-15.patch
deleted file mode 100644
index 22bb92c..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0012-ARM-dts-rockchip-Add-rk3288-veyron-jerry-rev-10-15.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 0c4cac5e8f0313a8777055c0c66a2216f78c6054 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Fri, 22 Mar 2019 12:59:24 -0700
-Subject: [PATCH 12/54] ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15
-
-As far as I can tell/remember rev10 was originally created to support
-making a SKU of jerry that had a different LCD.  rev11-rev15 were
-added to give some wiggle room for future builds.  Downstream has a
-separate device tree for rev10-rev15 (compared to rev3-rev7) with the
-expectation that differences relating to the LCD would be accounted
-for there but nothing was ever added to the rev10-rev15 making it
-identical to the rev3-rev7 one.
-
-It's likely nothing actually shipped with rev10-rev15 but they are
-listed in the downstream kernel's device tree and it seems like it
-should add a little safety if we match them here just in case
-something actually shipped with one of these revisions and that device
-will break if we don't claim support.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-jerry.dts | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-index 2ba89895c33a..517c6999a978 100644
---- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-@@ -11,7 +11,10 @@
- 
- / {
- 	model = "Google Jerry";
--	compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
-+	compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
-+		     "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
-+		     "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
-+		     "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
- 		     "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
- 		     "google,veyron-jerry-rev3", "google,veyron-jerry",
- 		     "google,veyron", "rockchip,rk3288";
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0013-ARM-dts-rockchip-Add-dvs-gpios-to-rk3288-veyron-jerr.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0013-ARM-dts-rockchip-Add-dvs-gpios-to-rk3288-veyron-jerr.patch
deleted file mode 100644
index 9e9063b..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0013-ARM-dts-rockchip-Add-dvs-gpios-to-rk3288-veyron-jerr.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 21f843ff948b4283c5d1f309651e90f978f5494e Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Fri, 22 Mar 2019 09:52:09 -0700
-Subject: [PATCH 13/54] ARM: dts: rockchip: Add dvs-gpios to
- rk3288-veyron-jerry
-
-When the rk3288-jerry device tree was first submitted we left out the
-dvs-gpios because I pointed out that the property "dvs-gpios" wasn't
-yet supported upstream [1].  Soon after that the property was added in
-commit bad47ad2eef3 ("regulator: rk808: fixed the overshoot when
-adjust voltage").  ...but we forgot to go back and add the property to
-the jerry device tree file.  Let's do so now.
-
-NOTE: without this patch, jerry is likely still stable (thanks to the
-fallback of making many small jumps in the rk808 regulator code) but
-it'll take quite a bit longer to make voltage transitions.
-
-[1] https://lore.kernel.org/linux-arm-kernel/CAD=FV=WwFgjzbk9xF5TU_ie6UnHQMyrZ176D4+jJTWWOoaKC2Q@mail.gmail.com/
-
-Fixes: f3ee390e4ef2 ("ARM: dts: rockchip: add veyron-jerry board")
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-jerry.dts | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-index 517c6999a978..3e8f700a0d64 100644
---- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-@@ -64,7 +64,9 @@
- 
- &rk808 {
- 	pinctrl-names = "default";
--	pinctrl-0 = <&pmic_int_l>;
-+	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
-+	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
-+		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
- 
- 	regulators {
- 		mic_vcc: LDO_REG2 {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0014-ARM-dts-rockchip-Add-vdd_logic-to-rk3288-veyron.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0014-ARM-dts-rockchip-Add-vdd_logic-to-rk3288-veyron.patch
deleted file mode 100644
index 92f8917..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0014-ARM-dts-rockchip-Add-vdd_logic-to-rk3288-veyron.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 864c2fee4ee93f53a8efed206c01ebce546df4e9 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Thu, 21 Mar 2019 13:19:44 -0700
-Subject: [PATCH 14/54] ARM: dts: rockchip: Add vdd_logic to rk3288-veyron
-
-The vdd_logic rail controls the voltage supplied to misc logic on
-rk3288, including the voltage supplied to the memory controller.  The
-vcc logic is implemented by a PWM regulator.
-
-Right now there are no consumers of vdd_logic on veyron but if anyone
-ever wants to try to add DDR Freq they'd need it.
-
-Note that in the downstream Chrome OS kernel the PWM regulator has
-a voltage table with these points:
-  1350000 0%
-  1300000 10%
-  1250000 20%
-  1200000 31%
-  1150000 41%
-  1125000 46%
-  1100000 52%
-  1050000 62%
-  1000000 72%
-   950000 83%
-
-The DDR Freq driver in the downstream kernel only uses some of those
-points, namely:
-  DDR3:  1200000, 1150000, 1100000, 1050000
-  LPDDR:          1150000, 1100000, 1050000
-
-When adapting the downstream kernel to upstream I have opted to switch
-to using the "continuous" mode of the PWM regulator driver.  This was
-the only way I could get the upstream driver to achieve _exactly_ the
-same voltages as the downstream driver could.  Specifically note that
-the old driver in downstream Chrome OS 3.14 _didn't_ have the
-DIV_ROUND_CLOSEST_ULL() in the Rockchip PLL driver.  That means if I
-use the same (downstream) table I might end up with a duty cycle
-that's 1 larger than was used downstream, leading to a slightly
-different voltage.  Due to the way the rounding worked I couldn't even
-just adjust the "percent" by 1 for a given voltage level--certain duty
-cycles just aren't achievable with the upstream math for voltage
-tables.
-
-Using continuous mode you can achieve the exact same duty cycle by
-simply adjusting the voltage you use by a tad bit.  The voltages that
-are equivalent to the ones used in the downstream kernel's table are:
-  1350000, 1304472, 1255691, 1200407, 1154878,
-  1128862, 1099593, 1050813, 1005285, 950000
-
-Note that the top/bottom voltage is exactly the same just due to the
-way that continuous mode is calculated and the fact that I used those
-as anchors.  I didn't make any attempt to do the resistor math (as was
-done on rk3399-gru).
-
-If anyone ever gets DDRFreq working on veyron upstream they should
-thus adjust the voltage specified in the DDRFreq operating points
-slightly (as per the above) to obtain the existing/tested values.  AKA
-you'd use:
-  DDR3:  1200407, 1154878, 1099593, 1050813
-  LPDDR:          1154878, 1099593, 1050813
-
-A few other notes:
-- The "period" here (1994) is different than the "period" downstream
-  (2000) for similar reasons: there's a DIV_ROUND_CLOSEST_ULL() that
-  wasn't downstream.  With 1994 upstream comes up with the same value
-  (0x94) to program into the hardware that downstream put there.  As
-  far as I can tell 0x94 actually means 1993.27.
-- The duty cycle unit of 0x94 was picked by just matching the period
-  which nicely allows us to insert 0x7b as that value to program into
-  the hardware for 950mV.  The 0x7b was found by observing what the
-  downstream kernel calculated (not that the system can actually run
-  with vdd_log at 950 mV).
-- The downstream kernel can also be seen to program a different value
-  into the CTRL field.  Upstream achieves 0x0b and downstream 0x1b.
-  This is because the upstream commit bc834d7b07b4 ("pwm: rockchip:
-  Move the configuration of polarity") fixed a bug by adding "ctrl &=
-  ~PWM_POLARITY_MASK".  Downstream accidentally left bit 4 set.
-  Luckily this bit doesn't matter--it's only used when the PWM goes
-  inactive (AKA if it's in oneshot mode or is disabled) and we don't
-  do that for the PWM regulator.
-
-I measured the voltage of vdd_log while adjusting it and found that
-with the upstream kernel voltage difference between requested and
-actual was 9.2 mV at 950 mV and 13.4 mV at 1350 mV with in-between
-voltages consistently showing ~1% error.  This error is likely
-expected as voltage can be seen to sag a bit when more load is put on
-the rail.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 0bc2409f6903..5181d9435fda 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -95,6 +95,23 @@
- 		regulator-boot-on;
- 		vin-supply = <&vcc_5v>;
- 	};
-+
-+	vdd_logic: vdd-logic {
-+		compatible = "pwm-regulator";
-+		regulator-name = "vdd_logic";
-+
-+		pwms = <&pwm1 0 1994 0>;
-+		pwm-supply = <&vcc33_sys>;
-+
-+		pwm-dutycycle-range = <0x7b 0>;
-+		pwm-dutycycle-unit = <0x94>;
-+
-+		regulator-always-on;
-+		regulator-boot-on;
-+		regulator-min-microvolt = <950000>;
-+		regulator-max-microvolt = <1350000>;
-+		regulator-ramp-delay = <4000>;
-+	};
- };
- 
- &cpu0 {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0016-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0016-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch
deleted file mode 100644
index 8c13856..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0016-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 282e2e078ba5338c72150477b743794bc7523917 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Wed, 20 Mar 2019 13:14:01 -0700
-Subject: [PATCH 16/54] ARM: dts: rockchip: Remove #address/#size-cells from
- rk3288 mipi_dsi
-
-They are pointless.  As dtc points out:
-  Warning (avoid_unnecessary_addr_size):
-  /mipi@ff960000:
-  unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
-
-Let's remove them.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288.dtsi | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index df0c5456c94f..a024d1e7e74c 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1119,8 +1119,6 @@
- 		clock-names = "ref", "pclk";
- 		power-domains = <&power RK3288_PD_VIO>;
- 		rockchip,grf = <&grf>;
--		#address-cells = <1>;
--		#size-cells = <0>;
- 		status = "disabled";
- 
- 		ports {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0017-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0017-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch
deleted file mode 100644
index 29f4d09..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0017-ARM-dts-rockchip-Remove-address-size-cells-from-rk32.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 1a96665143c355b1019ed13b927266185d2a1e4f Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Wed, 20 Mar 2019 13:14:02 -0700
-Subject: [PATCH 17/54] ARM: dts: rockchip: Remove #address/#size-cells from
- rk3288-veyron gpio-keys
-
-They are pointless.  As dtc points out:
-  Warning (avoid_unnecessary_addr_size):
-  /gpio-keys:
-  unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
-
-Let's remove them.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 0bc2409f6903..192dbc089ade 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -25,8 +25,6 @@
- 
- 	gpio_keys: gpio-keys {
- 		compatible = "gpio-keys";
--		#address-cells = <1>;
--		#size-cells = <0>;
- 
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pwr_key_l>;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0018-ARM-dts-rockchip-Add-device-tree-for-rk3288-veyron-m.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0018-ARM-dts-rockchip-Add-device-tree-for-rk3288-veyron-m.patch
deleted file mode 100644
index dabdd02..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0018-ARM-dts-rockchip-Add-device-tree-for-rk3288-veyron-m.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 01b2a2d52169372d73ec3639620b2b3255d5eb53 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Mon, 25 Mar 2019 09:20:05 -0700
-Subject: [PATCH 18/54] ARM: dts: rockchip: Add device tree for
- rk3288-veyron-mighty
-
-Mighty is basically the same Chromebook as Jaq but it has a full-sized
-SD slot and some different (slightly more rugged) plastics around it.
-Like Jaq, Mighty may show up with various different brandings but all
-of them have the same board inside.
-
-In the downstream kernel Mighty and Jaq share a "dtsi" and Mighty just
-adds the SD write protect (needed for a full-sized SD slot).  We'll do
-this upstream by just including the Jaq dts and make the changes.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-mighty.dts | 34 ++++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
- create mode 100644 arch/arm/boot/dts/rk3288-veyron-mighty.dts
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mighty.dts b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
-new file mode 100644
-index 000000000000..f640857cbdae
---- /dev/null
-+++ b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
-@@ -0,0 +1,34 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Google Veyron Mighty Rev 1+ board device tree source
-+ *
-+ * Copyright 2015 Google, Inc
-+ */
-+
-+/dts-v1/;
-+
-+#include "rk3288-veyron-jaq.dts"
-+
-+/ {
-+	model = "Google Mighty";
-+	compatible = "google,veyron-mighty-rev5", "google,veyron-mighty-rev4",
-+		     "google,veyron-mighty-rev3", "google,veyron-mighty-rev2",
-+		     "google,veyron-mighty-rev1", "google,veyron-mighty",
-+		     "google,veyron", "rockchip,rk3288";
-+};
-+
-+&sdmmc {
-+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
-+			&sdmmc_wp_gpio &sdmmc_bus4>;
-+	wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
-+
-+	/delete-property/ disable-wp;
-+};
-+
-+&pinctrl {
-+	sdmmc {
-+		sdmmc_wp_gpio: sdmmc-wp-gpio {
-+			rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
-+		};
-+	};
-+};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0019-ARM-dts-rockchip-Remove-unnecessary-setting-of-UART0.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0019-ARM-dts-rockchip-Remove-unnecessary-setting-of-UART0.patch
deleted file mode 100644
index eb18d40..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0019-ARM-dts-rockchip-Remove-unnecessary-setting-of-UART0.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 2f60eb2f03b9c3d0a31592c55a88ef62b1403b5d Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Wed, 10 Apr 2019 11:30:10 -0700
-Subject: [PATCH 19/54] ARM: dts: rockchip: Remove unnecessary setting of UART0
- SCLK rate on veyron
-
-Some veyron devices have a Bluetooth controller connected on UART0.
-The UART needs to operate at a high speed, however setting the clock
-rate at initialization has no practical effect. During initialization
-user space adjusts the UART baudrate multiple times, which ends up
-changing the SCLK rate. After a successful initiatalization the clk
-is running at the desired speed (48MHz).
-
-Remove the unnecessary clock rate configuration from the DT.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 5181d9435fda..fa38eb967f12 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -395,10 +395,6 @@
- &uart0 {
- 	status = "okay";
- 
--	/* We need to go faster than 24MHz, so adjust clock parents / rates */
--	assigned-clocks = <&cru SCLK_UART0>;
--	assigned-clock-rates = <48000000>;
--
- 	/* Pins don't include flow control by default; add that in */
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0020-ARM-dts-rockchip-Add-BT_EN-to-the-power-sequence-for.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0020-ARM-dts-rockchip-Add-BT_EN-to-the-power-sequence-for.patch
deleted file mode 100644
index 56ec594..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0020-ARM-dts-rockchip-Add-BT_EN-to-the-power-sequence-for.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 280fa349757bb240c650882feee5a861150ccc2d Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Tue, 9 Apr 2019 16:14:05 -0700
-Subject: [PATCH 20/54] ARM: dts: rockchip: Add BT_EN to the power sequence for
- veyron
-
-Add GPIO D5 (BT_ENABLE_L) as reset-GPIO to the power sequence for the
-Bluetooth/WiFi module. On devices with a Broadcom module the signal
-needs to be asserted to use Bluetooth.
-
-Note that BT_ENABLE_L is a misnomer in the schematics, the signal
-actually is active-high.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 13 ++++++++++---
- 1 file changed, 10 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index fa38eb967f12..efa7b425c9ed 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -62,12 +62,19 @@
- 		pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
- 
- 		/*
--		 * On the module itself this is one of these (depending
--		 * on the actual card populated):
-+		 * Depending on the actual card populated GPIO4 D4 and D5
-+		 * correspond to one of these signals on the module:
-+		 *
-+		 * D4:
- 		 * - SDIO_RESET_L_WL_REG_ON
- 		 * - PDN (power down when low)
-+		 *
-+		 * D5:
-+		 * - BT_I2S_WS_BT_RFDISABLE_L
-+		 * - No connect
- 		 */
--		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
-+		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>,
-+			      <&gpio4 RK_PD5 GPIO_ACTIVE_LOW>;
- 	};
- 
- 	vcc_5v: vcc-5v {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0021-ARM-dts-rockchip-bulk-convert-gpios-to-their-constan.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0021-ARM-dts-rockchip-bulk-convert-gpios-to-their-constan.patch
deleted file mode 100644
index d977045..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0021-ARM-dts-rockchip-bulk-convert-gpios-to-their-constan.patch
+++ /dev/null
@@ -1,2425 +0,0 @@
-From 07f08d9cee459b4d91d79becb7628c7ddeea0a59 Mon Sep 17 00:00:00 2001
-From: Heiko Stuebner <heiko@sntech.de>
-Date: Tue, 2 Apr 2019 14:08:57 +0200
-Subject: [PATCH 21/54] ARM: dts: rockchip: bulk convert gpios to their
- constant counterparts
-
-Rockchip SoCs use 2 different numbering schemes. Where the gpio-
-controllers just count 0-31 for their 32 gpios, the underlying
-iomux controller splits these into 4 separate entities A-D.
-
-Device-schematics always use these iomux-values to identify pins,
-so to make mapping schematics to devicetree easier Andy Yan introduced
-named constants for the pins but so far we only used them on new
-additions.
-
-Using a sed-script created by Emil Renner Berthing bulk-convert
-the remaining raw gpio numbers into their descriptive counterparts
-and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x
-mappings:
-
-/rockchip,pins *=/bcheck
-b # to end of script
-:append-next-line
-N
-:check
-/^[^;]*$/bappend-next-line
-s/<RK_GPIO\([0-9]\) /<\1 /g
-s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
-s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
-s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
-s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
-s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
-s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
-s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
-s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
-s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
-s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
-s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
-s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
-s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
-s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
-s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
-s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
-s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
-s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
-s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
-s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
-s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
-s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
-s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
-s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
-s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
-s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
-s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
-s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
-s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
-s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
-s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
-s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
-s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
-s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g
-
-Suggested-by: Emil Renner Berthing <esmil@mailme.dk>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk322x.dtsi                     | 170 ++++++-------
- arch/arm/boot/dts/rk3288-evb-act8846.dts          |   4 +-
- arch/arm/boot/dts/rk3288-evb.dtsi                 |  26 +-
- arch/arm/boot/dts/rk3288-fennec.dts               |  10 +-
- arch/arm/boot/dts/rk3288-firefly-beta.dts         |   4 +-
- arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi |  10 +-
- arch/arm/boot/dts/rk3288-firefly-reload.dts       |  36 +--
- arch/arm/boot/dts/rk3288-firefly.dts              |   4 +-
- arch/arm/boot/dts/rk3288-firefly.dtsi             |  38 +--
- arch/arm/boot/dts/rk3288-miqi.dts                 |  28 +--
- arch/arm/boot/dts/rk3288-phycore-rdk.dts          |  28 +--
- arch/arm/boot/dts/rk3288-phycore-som.dtsi         |  30 +--
- arch/arm/boot/dts/rk3288-r89.dts                  |  14 +-
- arch/arm/boot/dts/rk3288-rock2-som.dtsi           |   4 +-
- arch/arm/boot/dts/rk3288-rock2-square.dts         |  18 +-
- arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi |   8 +-
- arch/arm/boot/dts/rk3288-veyron-brain.dts         |   8 +-
- arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi   |  18 +-
- arch/arm/boot/dts/rk3288-veyron-jaq.dts           |  14 +-
- arch/arm/boot/dts/rk3288-veyron-jerry.dts         |  14 +-
- arch/arm/boot/dts/rk3288-veyron-mickey.dts        |   6 +-
- arch/arm/boot/dts/rk3288-veyron-mighty.dts        |   2 +-
- arch/arm/boot/dts/rk3288-veyron-minnie.dts        |  24 +-
- arch/arm/boot/dts/rk3288-veyron-pinky.dts         |   6 +-
- arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi        |  16 +-
- arch/arm/boot/dts/rk3288-veyron-speedy.dts        |  14 +-
- arch/arm/boot/dts/rk3288-veyron.dtsi              |  50 ++--
- arch/arm/boot/dts/rk3288-vyasa.dts                |   6 +-
- arch/arm/boot/dts/rk3288.dtsi                     | 286 +++++++++++-----------
- 30 files changed, 463 insertions(+), 463 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
-index 29f19076dceb..da102fff96a2 100644
---- a/arch/arm/boot/dts/rk322x.dtsi
-+++ b/arch/arm/boot/dts/rk322x.dtsi
-@@ -865,228 +865,228 @@
- 
- 		emmc {
- 			emmc_clk: emmc-clk {
--				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>;
- 			};
- 
- 			emmc_cmd: emmc-cmd {
--				rockchip,pins = <1 22 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PC6 2 &pcfg_pull_none>;
- 			};
- 
- 			emmc_bus8: emmc-bus8 {
--				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
--						<1 25 RK_FUNC_2 &pcfg_pull_none>,
--						<1 26 RK_FUNC_2 &pcfg_pull_none>,
--						<1 27 RK_FUNC_2 &pcfg_pull_none>,
--						<1 28 RK_FUNC_2 &pcfg_pull_none>,
--						<1 29 RK_FUNC_2 &pcfg_pull_none>,
--						<1 30 RK_FUNC_2 &pcfg_pull_none>,
--						<1 31 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>,
-+						<1 RK_PD1 2 &pcfg_pull_none>,
-+						<1 RK_PD2 2 &pcfg_pull_none>,
-+						<1 RK_PD3 2 &pcfg_pull_none>,
-+						<1 RK_PD4 2 &pcfg_pull_none>,
-+						<1 RK_PD5 2 &pcfg_pull_none>,
-+						<1 RK_PD6 2 &pcfg_pull_none>,
-+						<1 RK_PD7 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		gmac {
- 			rgmii_pins: rgmii-pins {
--				rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
--						<2 12 RK_FUNC_1 &pcfg_pull_none>,
--						<2 25 RK_FUNC_1 &pcfg_pull_none>,
--						<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 17 RK_FUNC_1 &pcfg_pull_none>,
--						<2 16 RK_FUNC_1 &pcfg_pull_none>,
--						<2 21 RK_FUNC_2 &pcfg_pull_none>,
--						<2 20 RK_FUNC_2 &pcfg_pull_none>,
--						<2 11 RK_FUNC_1 &pcfg_pull_none>,
--						<2 8 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,
-+						<2 RK_PB4 1 &pcfg_pull_none>,
-+						<2 RK_PD1 1 &pcfg_pull_none>,
-+						<2 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC6 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC7 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PB1 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PB5 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC1 1 &pcfg_pull_none>,
-+						<2 RK_PC0 1 &pcfg_pull_none>,
-+						<2 RK_PC5 2 &pcfg_pull_none>,
-+						<2 RK_PC4 2 &pcfg_pull_none>,
-+						<2 RK_PB3 1 &pcfg_pull_none>,
-+						<2 RK_PB0 1 &pcfg_pull_none>;
- 			};
- 
- 			rmii_pins: rmii-pins {
--				rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
--						<2 12 RK_FUNC_1 &pcfg_pull_none>,
--						<2 25 RK_FUNC_1 &pcfg_pull_none>,
--						<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
--						<2 17 RK_FUNC_1 &pcfg_pull_none>,
--						<2 16 RK_FUNC_1 &pcfg_pull_none>,
--						<2 8 RK_FUNC_1 &pcfg_pull_none>,
--						<2 15 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,
-+						<2 RK_PB4 1 &pcfg_pull_none>,
-+						<2 RK_PD1 1 &pcfg_pull_none>,
-+						<2 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PB5 1 &pcfg_pull_none_drv_12ma>,
-+						<2 RK_PC1 1 &pcfg_pull_none>,
-+						<2 RK_PC0 1 &pcfg_pull_none>,
-+						<2 RK_PB0 1 &pcfg_pull_none>,
-+						<2 RK_PB7 1 &pcfg_pull_none>;
- 			};
- 
- 			phy_pins: phy-pins {
--				rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
--						<2 8 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PB6 2 &pcfg_pull_none>,
-+						<2 RK_PB0 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c0 {
- 			i2c0_xfer: i2c0-xfer {
--				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
--						<0 1 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
-+						<0 RK_PA1 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c1 {
- 			i2c1_xfer: i2c1-xfer {
--				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
--						<0 3 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
-+						<0 RK_PA3 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c2 {
- 			i2c2_xfer: i2c2-xfer {
--				rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
--						<2 21 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>,
-+						<2 RK_PC5 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c3 {
- 			i2c3_xfer: i2c3-xfer {
--				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
--						<0 7 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
-+						<0 RK_PA7 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		spi-0 {
- 			spi0_clk: spi0-clk {
--				rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PB1 2 &pcfg_pull_up>;
- 			};
- 			spi0_cs0: spi0-cs0 {
--				rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PB6 2 &pcfg_pull_up>;
- 			};
- 			spi0_tx: spi0-tx {
--				rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PB3 2 &pcfg_pull_up>;
- 			};
- 			spi0_rx: spi0-rx {
--				rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PB5 2 &pcfg_pull_up>;
- 			};
- 			spi0_cs1: spi0-cs1 {
--				rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <1 RK_PB4 1 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		spi-1 {
- 			spi1_clk: spi1-clk {
--				rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PC7 2 &pcfg_pull_up>;
- 			};
- 			spi1_cs0: spi1-cs0 {
--				rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <2 RK_PA2 2 &pcfg_pull_up>;
- 			};
- 			spi1_rx: spi1-rx {
--				rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <2 RK_PA0 2 &pcfg_pull_up>;
- 			};
- 			spi1_tx: spi1-tx {
--				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <2 RK_PA1 2 &pcfg_pull_up>;
- 			};
- 			spi1_cs1: spi1-cs1 {
--				rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <2 RK_PA3 2 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		i2s1 {
- 			i2s1_bus: i2s1-bus {
--				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
--						<0 9 RK_FUNC_1 &pcfg_pull_none>,
--						<0 11 RK_FUNC_1 &pcfg_pull_none>,
--						<0 12 RK_FUNC_1 &pcfg_pull_none>,
--						<0 13 RK_FUNC_1 &pcfg_pull_none>,
--						<0 14 RK_FUNC_1 &pcfg_pull_none>,
--						<1 2 RK_FUNC_2 &pcfg_pull_none>,
--						<1 4 RK_FUNC_2 &pcfg_pull_none>,
--						<1 5 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
-+						<0 RK_PB1 1 &pcfg_pull_none>,
-+						<0 RK_PB3 1 &pcfg_pull_none>,
-+						<0 RK_PB4 1 &pcfg_pull_none>,
-+						<0 RK_PB5 1 &pcfg_pull_none>,
-+						<0 RK_PB6 1 &pcfg_pull_none>,
-+						<1 RK_PA2 2 &pcfg_pull_none>,
-+						<1 RK_PA4 2 &pcfg_pull_none>,
-+						<1 RK_PA5 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm0 {
- 			pwm0_pin: pwm0-pin {
--				rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PC5 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm1 {
- 			pwm1_pin: pwm1-pin {
--				rockchip,pins = <0 30 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm2 {
- 			pwm2_pin: pwm2-pin {
--				rockchip,pins = <1 12 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB4 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm3 {
- 			pwm3_pin: pwm3-pin {
--				rockchip,pins = <1 11 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		spdif {
- 			spdif_tx: spdif-tx {
--				rockchip,pins = <3 31 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PD7 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		tsadc {
- 			otp_gpio: otp-gpio {
--				rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- 			};
- 
- 			otp_out: otp-out {
--				rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart0 {
- 			uart0_xfer: uart0-xfer {
--				rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,
--						<2 27 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PD2 1 &pcfg_pull_none>,
-+						<2 RK_PD3 1 &pcfg_pull_none>;
- 			};
- 
- 			uart0_cts: uart0-cts {
--				rockchip,pins = <2 29 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PD5 1 &pcfg_pull_none>;
- 			};
- 
- 			uart0_rts: uart0-rts {
--				rockchip,pins = <0 17 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PC1 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart1 {
- 			uart1_xfer: uart1-xfer {
--				rockchip,pins = <1 9 RK_FUNC_1 &pcfg_pull_none>,
--						<1 10 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>,
-+						<1 RK_PB2 1 &pcfg_pull_none>;
- 			};
- 
- 			uart1_cts: uart1-cts {
--				rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>;
- 			};
- 
- 			uart1_rts: uart1-rts {
--				rockchip,pins = <1 11 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart2 {
- 			uart2_xfer: uart2-xfer {
--				rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,
--						<1 19 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up>,
-+						<1 RK_PC3 2 &pcfg_pull_none>;
- 			};
- 
- 			uart21_xfer: uart21-xfer {
--				rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
--						<1 9 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PB2 2 &pcfg_pull_up>,
-+						<1 RK_PB1 2 &pcfg_pull_none>;
- 			};
- 
- 			uart2_cts: uart2-cts {
--				rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
- 			};
- 
- 			uart2_rts: uart2-rts {
--				rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
- 			};
- 		};
- 	};
-diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
-index 6592c809e2a5..80080767c365 100644
---- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
-+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
-@@ -175,13 +175,13 @@
- &pinctrl {
- 	lcd {
- 		lcd_en: lcd-en  {
--			rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	wifi {
- 		wifi_pwr: wifi-pwr {
--			rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
-index 97e4d552ff0f..820440715302 100644
---- a/arch/arm/boot/dts/rk3288-evb.dtsi
-+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
-@@ -314,25 +314,25 @@
- 
- 	backlight {
- 		bl_en: bl-en {
--			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buttons {
- 		pwrbtn: pwrbtn {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	lcd {
- 		lcd_cs: lcd-cs {
--			rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
-@@ -342,34 +342,34 @@
- 		 * high-speed mode on EVB board so bump up to 8ma.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
-+					<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
-+					<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
-+					<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
- 		};
- 
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	eth_phy {
- 		eth_phy_pwr: eth-phy-pwr {
--			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
-index 29af26e6d442..4847cf902a15 100644
---- a/arch/arm/boot/dts/rk3288-fennec.dts
-+++ b/arch/arm/boot/dts/rk3288-fennec.dts
-@@ -278,27 +278,27 @@
- 
- 	gmac {
- 		phy_int: phy-int {
--			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_pmeb: phy-pmeb {
--			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	usbphy {
- 		host_drv: host-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-firefly-beta.dts b/arch/arm/boot/dts/rk3288-firefly-beta.dts
-index 0f3c29d7fbab..135e8832141f 100644
---- a/arch/arm/boot/dts/rk3288-firefly-beta.dts
-+++ b/arch/arm/boot/dts/rk3288-firefly-beta.dts
-@@ -18,13 +18,13 @@
- &pinctrl {
- 	act8846 {
- 		pmic_vsel: pmic-vsel {
--			rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 	};
- 
- 	ir {
- 		ir_int: ir-int {
--			rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
-index f57f286a93c3..61435d8ee37b 100644
---- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
-+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
-@@ -224,25 +224,25 @@
- 
- 	act8846 {
- 		pwr_hold: pwr-hold {
--			rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 
- 		pmic_vsel: pmic-vsel {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 	};
- 
- 	gmac {
- 		phy_int: phy-int {
--			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_pmeb: phy-pmeb {
--			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
-index 3a646c5f4fcf..1574383fd2dc 100644
---- a/arch/arm/boot/dts/rk3288-firefly-reload.dts
-+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
-@@ -306,39 +306,39 @@
- &pinctrl {
- 	ir {
- 		ir_int: ir-int {
--			rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	dvp {
- 		dvp_pwr: dvp-pwr {
--			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		cif_pwr: cif-pwr {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	hym8563 {
- 		rtc_int: rtc-int {
--			rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	keys {
- 		pwr_key: pwr-key {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	leds {
- 		power_led: power-led {
--			rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		work_led: work-led {
--			rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
-@@ -348,44 +348,44 @@
- 		 * high-speed mode on firefly board so bump up to 12ma.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	sdio {
- 		wifi_enable: wifi-enable {
--			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb_host {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		usbhub_rst: usbhub-rst {
--			rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	usb_otg {
- 		otg_vbus_drv: otg-vbus-drv {
--			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-firefly.dts b/arch/arm/boot/dts/rk3288-firefly.dts
-index 556ab42dd81c..313459dab2e4 100644
---- a/arch/arm/boot/dts/rk3288-firefly.dts
-+++ b/arch/arm/boot/dts/rk3288-firefly.dts
-@@ -18,13 +18,13 @@
- &pinctrl {
- 	act8846 {
- 		pmic_vsel: pmic-vsel {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 	};
- 
- 	ir {
- 		ir_int: ir-int {
--			rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
-index a6ff7eac4aa8..5e0a19004e46 100644
---- a/arch/arm/boot/dts/rk3288-firefly.dtsi
-+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
-@@ -392,49 +392,49 @@
- 
- 	act8846 {
- 		pwr_hold: pwr-hold {
--			rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	dvp {
- 		dvp_pwr: dvp-pwr {
--			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	gmac {
- 		phy_int: phy-int {
--			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_pmeb: phy-pmeb {
--			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	hym8563 {
- 		rtc_int: rtc-int {
--			rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	keys {
- 		pwr_key: pwr-key {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	leds {
- 		power_led: power-led {
--			rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		work_led: work-led {
--			rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
-@@ -444,38 +444,38 @@
- 		 * high-speed mode on firefly board so bump up to 12ma.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb_host {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		usbhub_rst: usbhub-rst {
--			rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	usb_otg {
- 		otg_vbus_drv: otg-vbus-drv {
--			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
-index fb7365b604bb..c41d012c8850 100644
---- a/arch/arm/boot/dts/rk3288-miqi.dts
-+++ b/arch/arm/boot/dts/rk3288-miqi.dts
-@@ -296,29 +296,29 @@
- 
- 	act8846 {
- 		pmic_int: pmic-int {
--			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		pmic_sleep: pmic-sleep {
--			rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 
- 		pmic_vsel: pmic-vsel {
--			rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 	};
- 
- 	gmac {
- 		phy_int: phy-int {
--			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_pmeb: phy-pmeb {
--			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
-@@ -328,28 +328,28 @@
- 		 * high-speed mode on firefly board so bump up to 12ma.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb_host {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-phycore-rdk.dts b/arch/arm/boot/dts/rk3288-phycore-rdk.dts
-index 7077c3403483..1e33859de484 100644
---- a/arch/arm/boot/dts/rk3288-phycore-rdk.dts
-+++ b/arch/arm/boot/dts/rk3288-phycore-rdk.dts
-@@ -160,15 +160,15 @@
- 	buttons {
- 		user_button_pins: user-button-pins {
- 			/* button 1 */
--			rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
-+			rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
- 			/* button 2 */
--					<8 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+					<8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	rv4162 {
- 		i2c_rtc_int: i2c-rtc-int {
--			rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
-@@ -178,44 +178,44 @@
- 		 * high-speed mode on pcm-947 board so bump up to 12 mA.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
-+					<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
- 		};
- 
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	touchscreen {
- 		ts_irq_pin: ts-irq-pin {
--			rockchip,pins = <5 15 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <5 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb_host {
- 		host0_vbus_drv: host0-vbus-drv {
--			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		host1_vbus_drv: host1-vbus-drv {
--			rockchip,pins = <2 0 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	usb_otg {
- 		otg_vbus_drv: otg-vbus-drv {
--			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
-index c218dd54c9b5..77a47b9b756d 100644
---- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi
-+++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
-@@ -342,49 +342,49 @@
- 		 * We also have external pulls, so disable the internal ones.
- 		 */
- 		emmc_clk: emmc-clk {
--			rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_12ma>;
- 		};
- 
- 		emmc_cmd: emmc-cmd {
--			rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_12ma>;
- 		};
- 
- 		emmc_bus8: emmc-bus8 {
--			rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
--					<3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
-+			rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA1 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA2 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA3 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA4 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA5 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA6 2 &pcfg_pull_none_12ma>,
-+					<3 RK_PA7 2 &pcfg_pull_none_12ma>;
- 		};
- 	};
- 
- 	gmac {
- 		phy_int: phy-int {
--			rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	leds {
- 		user_led: user-led {
--			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		/* Pin for switching state between sleep and non-sleep state */
- 		pmic_sleep: pmic-sleep {
--			rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts
-index 28972fb4e221..a6ffc381abaa 100644
---- a/arch/arm/boot/dts/rk3288-r89.dts
-+++ b/arch/arm/boot/dts/rk3288-r89.dts
-@@ -265,39 +265,39 @@
- 
- 	act8846 {
- 		pmic_vsel: pmic-vsel {
--			rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 
- 		pwr_hold: pwr-hold {
--			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	buttons {
- 		pwrbtn: pwrbtn {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	ir {
- 		ir_int: ir-int {
--			rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	usb {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		otg_vbus_drv: otg-vbus-drv {
--			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-index 32e1ab336662..9f9e2bfd1295 100644
---- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
-@@ -231,13 +231,13 @@
- 
- 	emmc {
- 			emmc_reset: emmc-reset {
--				rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- 			};
- 	};
- 
- 	gmac {
- 		phy_rst: phy-rst {
--			rockchip,pins = <4 8 RK_FUNC_GPIO  &pcfg_output_high>;
-+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO  &pcfg_output_high>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
-index 5b7e1c9e92e1..cdcdc921ee09 100644
---- a/arch/arm/boot/dts/rk3288-rock2-square.dts
-+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
-@@ -204,53 +204,53 @@
- &pinctrl {
- 	ir {
- 		ir_int: ir-int {
--			rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	keys {
- 		pwr_key: pwr-key {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	headphone {
- 		hp_det: hp-det {
--			rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		phone_ctl: phone-ctl {
--			rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	usb {
- 		host_vbus_drv: host-vbus-drv {
--			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	sata {
- 		sata_pwr_en: sata-pwr-en {
--			rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	sdmmc {
- 		sdmmc_pwr: sdmmc-pwr {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	sdio {
- 		wifi_enable: wifi-enable {
--			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
-index eaf921694e68..445270aa136e 100644
---- a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
-@@ -73,7 +73,7 @@
- &pinctrl {
- 	codec {
- 		hp_det: hp-det {
--			rockchip,pins = <6 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		/*
-@@ -82,17 +82,17 @@
- 		 * we've got a ts3a227e chip but the driver requires it.
- 		 */
- 		int_codec: int-codec {
--			rockchip,pins = <6 7 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		mic_det: mic-det {
--			rockchip,pins = <6 11 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	headset {
- 		ts3a227e_int_l: ts3a227e-int-l {
--			rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rk3288-veyron-brain.dts
-index 5c94a33d695d..406146cbff29 100644
---- a/arch/arm/boot/dts/rk3288-veyron-brain.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-brain.dts
-@@ -42,23 +42,23 @@
- &pinctrl {
- 	hdmi {
- 		vcc50_hdmi_en: vcc50-hdmi-en {
--			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- 
- 	usb-host {
- 		usb2_pwr_en: usb2-pwr-en {
--			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-index b54746df3661..72c4754032e9 100644
---- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-@@ -244,51 +244,51 @@
- 
- 	backlight {
- 		bl_en: bl-en {
--			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buttons {
- 		ap_lid_int_l: ap-lid-int-l {
--			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	charger {
- 		ac_present_ap: ac-present-ap {
--			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	cros-ec {
- 		ec_int: ec-int {
--			rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	suspend {
- 		suspend_l_wake: suspend-l-wake {
--			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
-+			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
- 		};
- 
- 		suspend_l_sleep: suspend-l-sleep {
--			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 	};
- 
- 	trackpad {
- 		trackpad_int: trackpad-int {
--			rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	usb-host {
- 		host1_pwr_en: host1-pwr-en {
--			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		usbotg_pwren_h: usbotg-pwren-h {
--			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
-index 9d6814c7f285..e248f55ee8d2 100644
---- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
-@@ -138,39 +138,39 @@
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buck-5v {
- 		drv_5v: drv-5v {
--			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	hdmi {
- 		vcc50_hdmi_en: vcc50-hdmi-en {
--			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	lcd {
- 		lcd_enable_h: lcd-en {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		avdd_1v8_disp_en: avdd-1v8-disp-en {
--			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-index 3e8f700a0d64..b1613af83d5d 100644
---- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-@@ -106,39 +106,39 @@
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buck-5v {
- 		drv_5v: drv-5v {
--			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	hdmi {
- 		vcc50_hdmi_en: vcc50-hdmi-en {
--			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	lcd {
- 		lcd_enable_h: lcd-en {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		avdd_1v8_disp_en: avdd-1v8-disp-en {
--			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-index d889ab3c8235..e852594417b5 100644
---- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-@@ -186,17 +186,17 @@
- &pinctrl {
- 	hdmi {
- 		power_hdmi_on: power-hdmi-on {
--			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mighty.dts b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
-index f640857cbdae..27fbc07476d2 100644
---- a/arch/arm/boot/dts/rk3288-veyron-mighty.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
-@@ -28,7 +28,7 @@
- &pinctrl {
- 	sdmmc {
- 		sdmmc_wp_gpio: sdmmc-wp-gpio {
--			rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-index f95d0c5fcf71..468a1818545d 100644
---- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-@@ -191,65 +191,65 @@
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buck-5v {
- 		drv_5v: drv-5v {
--			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buttons {
- 		volum_down_l: volum-down-l {
--			rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 
- 		volum_up_l: volum-up-l {
--			rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	hdmi {
- 		vcc50_hdmi_en: vcc50-hdmi-en {
--			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	lcd {
- 		lcd_enable_h: lcd-en {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		avdd_1v8_disp_en: avdd-1v8-disp-en {
--			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- 
- 	prochot {
- 		gpio_prochot: gpio-prochot {
--			rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	touchscreen {
- 		touch_int: touch-int {
--			rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		touch_rst: touch-rst {
--			rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
-index 2950aadf49f0..9645be7b3d8c 100644
---- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
-@@ -55,19 +55,19 @@
- &pinctrl {
- 	buttons {
- 		pwr_key_h: pwr-key-h {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	emmc {
- 		emmc_reset: emmc-reset {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	sdmmc {
- 		sdmmc_wp_gpio: sdmmc-wp-gpio {
--			rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
-index a4570444cc79..fe950f9863e8 100644
---- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
-@@ -16,18 +16,18 @@
- 		 * We also have external pulls, so disable the internal ones.
- 		 */
- 		sdmmc_bus4: sdmmc-bus4 {
--			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<6 17 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<6 18 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<6 19 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_none_drv_8ma>,
-+					<6 RK_PC1 1 &pcfg_pull_none_drv_8ma>,
-+					<6 RK_PC2 1 &pcfg_pull_none_drv_8ma>,
-+					<6 RK_PC3 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		sdmmc_clk: sdmmc-clk {
--			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		sdmmc_cmd: sdmmc-cmd {
--			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		/*
-@@ -37,12 +37,12 @@
- 		 * think there's a card inserted
- 		 */
- 		sdmmc_cd_disabled: sdmmc-cd-disabled {
--			rockchip,pins = <6 22 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <6 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		/* This is where we actually hook up CD */
- 		sdmmc_cd_gpio: sdmmc-cd-gpio {
--			rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-index e16421d80d22..2ac8748a3a0c 100644
---- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-@@ -104,39 +104,39 @@
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	buck-5v {
- 		drv_5v: drv-5v {
--			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	hdmi {
- 		vcc50_hdmi_en: vcc50-hdmi-en {
--			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	lcd {
- 		lcd_enable_h: lcd-en {
--			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		avdd_1v8_disp_en: avdd-1v8-disp-en {
--			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	pmic {
- 		dvs_1: dvs-1 {
--			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 
- 		dvs_2: dvs-2 {
--			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
-+			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index efa7b425c9ed..e4f0c00011f2 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -480,13 +480,13 @@
- 
- 	buttons {
- 		pwr_key_l: pwr-key-l {
--			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	emmc {
- 		emmc_reset: emmc-reset {
--			rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		/*
-@@ -494,51 +494,51 @@
- 		 * We also have external pulls, so disable the internal ones.
- 		 */
- 		emmc_clk: emmc-clk {
--			rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		emmc_cmd: emmc-cmd {
--			rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		emmc_bus8: emmc-bus8 {
--			rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
--					<3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA1 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA2 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA3 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA4 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA5 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA6 2 &pcfg_pull_none_drv_8ma>,
-+					<3 RK_PA7 2 &pcfg_pull_none_drv_8ma>;
- 		};
- 	};
- 
- 	pmic {
- 		pmic_int_l: pmic-int-l {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	reboot {
- 		ap_warm_reset_h: ap-warm-reset-h {
--			rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	recovery-switch {
- 		rec_mode_l: rec-mode-l {
--			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	sdio0 {
- 		wifi_enable_h: wifienable-h {
--			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		/* NOTE: mislabelled on schematic; should be bt_enable_h */
- 		bt_enable_l: bt-enable-l {
--			rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
- 		/*
-@@ -546,30 +546,30 @@
- 		 * We also have external pulls, so disable the internal ones.
- 		 */
- 		sdio0_bus4: sdio0-bus4 {
--			rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
--					<4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <4 RK_PC4 1 &pcfg_pull_none_drv_8ma>,
-+					<4 RK_PC5 1 &pcfg_pull_none_drv_8ma>,
-+					<4 RK_PC6 1 &pcfg_pull_none_drv_8ma>,
-+					<4 RK_PC7 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		sdio0_cmd: sdio0-cmd {
--			rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <4 RK_PD0 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 
- 		sdio0_clk: sdio0-clk {
--			rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
-+			rockchip,pins = <4 RK_PD1 1 &pcfg_pull_none_drv_8ma>;
- 		};
- 	};
- 
- 	tpm {
- 		tpm_int_h: tpm-int-h {
--			rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- 
- 	write-protect {
- 		fw_wp_ap: fw-wp-ap {
--			rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <7 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
- };
-diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts
-index 40b232eb5011..ba06e9f97ddc 100644
---- a/arch/arm/boot/dts/rk3288-vyasa.dts
-+++ b/arch/arm/boot/dts/rk3288-vyasa.dts
-@@ -448,13 +448,13 @@
- 
- 	pmic {
- 		pmic_int: pmic-int {
--			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
-+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
- 
- 	usb_host {
- 		phy_pwr_en: phy-pwr-en {
--			rockchip,pins = <RK_GPIO2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>;
-+			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>;
- 		};
- 
- 		usb2_pwr_en: usb2-pwr-en {
-@@ -464,7 +464,7 @@
- 
- 	usb_otg {
- 		otg_vbus_drv: otg-vbus-drv {
--			rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
-+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- 
- 		};
- 	};
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 743a7d85daf7..23e9c5253019 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1532,16 +1532,16 @@
- 
- 		hdmi {
- 			hdmi_cec_c0: hdmi-cec-c0 {
--				rockchip,pins = <7 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC0 2 &pcfg_pull_none>;
- 			};
- 
- 			hdmi_cec_c7: hdmi-cec-c7 {
--				rockchip,pins = <7 RK_PC7 RK_FUNC_4 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC7 4 &pcfg_pull_none>;
- 			};
- 
- 			hdmi_ddc: hdmi-ddc {
--				rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
--						<7 20 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC3 2 &pcfg_pull_none>,
-+						<7 RK_PC4 2 &pcfg_pull_none>;
- 			};
- 		};
- 
-@@ -1564,421 +1564,421 @@
- 
- 		sleep {
- 			global_pwroff: global-pwroff {
--				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
- 			};
- 
- 			ddrio_pwroff: ddrio-pwroff {
--				rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
- 			};
- 
- 			ddr0_retention: ddr0-retention {
--				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
- 			};
- 
- 			ddr1_retention: ddr1-retention {
--				rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		edp {
- 			edp_hpd: edp-hpd {
--				rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
-+				rockchip,pins = <7 RK_PB3 2 &pcfg_pull_down>;
- 			};
- 		};
- 
- 		i2c0 {
- 			i2c0_xfer: i2c0-xfer {
--				rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,
--						<0 16 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>,
-+						<0 RK_PC0 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c1 {
- 			i2c1_xfer: i2c1-xfer {
--				rockchip,pins = <8 4 RK_FUNC_1 &pcfg_pull_none>,
--						<8 5 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <8 RK_PA4 1 &pcfg_pull_none>,
-+						<8 RK_PA5 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c2 {
- 			i2c2_xfer: i2c2-xfer {
--				rockchip,pins = <6 9 RK_FUNC_1 &pcfg_pull_none>,
--						<6 10 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <6 RK_PB1 1 &pcfg_pull_none>,
-+						<6 RK_PB2 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c3 {
- 			i2c3_xfer: i2c3-xfer {
--				rockchip,pins = <2 16 RK_FUNC_1 &pcfg_pull_none>,
--						<2 17 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>,
-+						<2 RK_PC1 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c4 {
- 			i2c4_xfer: i2c4-xfer {
--				rockchip,pins = <7 17 RK_FUNC_1 &pcfg_pull_none>,
--						<7 18 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC1 1 &pcfg_pull_none>,
-+						<7 RK_PC2 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2c5 {
- 			i2c5_xfer: i2c5-xfer {
--				rockchip,pins = <7 19 RK_FUNC_1 &pcfg_pull_none>,
--						<7 20 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC3 1 &pcfg_pull_none>,
-+						<7 RK_PC4 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		i2s0 {
- 			i2s0_bus: i2s0-bus {
--				rockchip,pins = <6 0 RK_FUNC_1 &pcfg_pull_none>,
--						<6 1 RK_FUNC_1 &pcfg_pull_none>,
--						<6 2 RK_FUNC_1 &pcfg_pull_none>,
--						<6 3 RK_FUNC_1 &pcfg_pull_none>,
--						<6 4 RK_FUNC_1 &pcfg_pull_none>,
--						<6 8 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <6 RK_PA0 1 &pcfg_pull_none>,
-+						<6 RK_PA1 1 &pcfg_pull_none>,
-+						<6 RK_PA2 1 &pcfg_pull_none>,
-+						<6 RK_PA3 1 &pcfg_pull_none>,
-+						<6 RK_PA4 1 &pcfg_pull_none>,
-+						<6 RK_PB0 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		lcdc {
- 			lcdc_ctl: lcdc-ctl {
--				rockchip,pins = <1 24 RK_FUNC_1 &pcfg_pull_none>,
--						<1 25 RK_FUNC_1 &pcfg_pull_none>,
--						<1 26 RK_FUNC_1 &pcfg_pull_none>,
--						<1 27 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>,
-+						<1 RK_PD1 1 &pcfg_pull_none>,
-+						<1 RK_PD2 1 &pcfg_pull_none>,
-+						<1 RK_PD3 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		sdmmc {
- 			sdmmc_clk: sdmmc-clk {
--				rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none>;
- 			};
- 
- 			sdmmc_cmd: sdmmc-cmd {
--				rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up>;
- 			};
- 
- 			sdmmc_cd: sdmmc-cd {
--				rockchip,pins = <6 22 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <6 RK_PC6 1 &pcfg_pull_up>;
- 			};
- 
- 			sdmmc_bus1: sdmmc-bus1 {
--				rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>;
- 			};
- 
- 			sdmmc_bus4: sdmmc-bus4 {
--				rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>,
--						<6 17 RK_FUNC_1 &pcfg_pull_up>,
--						<6 18 RK_FUNC_1 &pcfg_pull_up>,
--						<6 19 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>,
-+						<6 RK_PC1 1 &pcfg_pull_up>,
-+						<6 RK_PC2 1 &pcfg_pull_up>,
-+						<6 RK_PC3 1 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		sdio0 {
- 			sdio0_bus1: sdio0-bus1 {
--				rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_bus4: sdio0-bus4 {
--				rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>,
--						<4 21 RK_FUNC_1 &pcfg_pull_up>,
--						<4 22 RK_FUNC_1 &pcfg_pull_up>,
--						<4 23 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>,
-+						<4 RK_PC5 1 &pcfg_pull_up>,
-+						<4 RK_PC6 1 &pcfg_pull_up>,
-+						<4 RK_PC7 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_cmd: sdio0-cmd {
--				rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD0 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_clk: sdio0-clk {
--				rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <4 RK_PD1 1 &pcfg_pull_none>;
- 			};
- 
- 			sdio0_cd: sdio0-cd {
--				rockchip,pins = <4 26 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD2 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_wp: sdio0-wp {
--				rockchip,pins = <4 27 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD3 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_pwr: sdio0-pwr {
--				rockchip,pins = <4 28 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD4 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_bkpwr: sdio0-bkpwr {
--				rockchip,pins = <4 29 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD5 1 &pcfg_pull_up>;
- 			};
- 
- 			sdio0_int: sdio0-int {
--				rockchip,pins = <4 30 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PD6 1 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		sdio1 {
- 			sdio1_bus1: sdio1-bus1 {
--				rockchip,pins = <3 24 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_bus4: sdio1-bus4 {
--				rockchip,pins = <3 24 4 &pcfg_pull_up>,
--						<3 25 4 &pcfg_pull_up>,
--						<3 26 4 &pcfg_pull_up>,
--						<3 27 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>,
-+						<3 RK_PD1 4 &pcfg_pull_up>,
-+						<3 RK_PD2 4 &pcfg_pull_up>,
-+						<3 RK_PD3 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_cd: sdio1-cd {
--				rockchip,pins = <3 28 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD4 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_wp: sdio1-wp {
--				rockchip,pins = <3 29 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD5 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_bkpwr: sdio1-bkpwr {
--				rockchip,pins = <3 30 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD6 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_int: sdio1-int {
--				rockchip,pins = <3 31 4 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PD7 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_cmd: sdio1-cmd {
--				rockchip,pins = <4 6 4 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PA6 4 &pcfg_pull_up>;
- 			};
- 
- 			sdio1_clk: sdio1-clk {
--				rockchip,pins = <4 7 4 &pcfg_pull_none>;
-+				rockchip,pins = <4 RK_PA7 4 &pcfg_pull_none>;
- 			};
- 
- 			sdio1_pwr: sdio1-pwr {
--				rockchip,pins = <4 9 4 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PB1 4 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		emmc {
- 			emmc_clk: emmc-clk {
--				rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none>;
- 			};
- 
- 			emmc_cmd: emmc-cmd {
--				rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PC0 2 &pcfg_pull_up>;
- 			};
- 
- 			emmc_pwr: emmc-pwr {
--				rockchip,pins = <3 9 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PB1 2 &pcfg_pull_up>;
- 			};
- 
- 			emmc_bus1: emmc-bus1 {
--				rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>;
- 			};
- 
- 			emmc_bus4: emmc-bus4 {
--				rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
--						<3 1 RK_FUNC_2 &pcfg_pull_up>,
--						<3 2 RK_FUNC_2 &pcfg_pull_up>,
--						<3 3 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>,
-+						<3 RK_PA1 2 &pcfg_pull_up>,
-+						<3 RK_PA2 2 &pcfg_pull_up>,
-+						<3 RK_PA3 2 &pcfg_pull_up>;
- 			};
- 
- 			emmc_bus8: emmc-bus8 {
--				rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
--						<3 1 RK_FUNC_2 &pcfg_pull_up>,
--						<3 2 RK_FUNC_2 &pcfg_pull_up>,
--						<3 3 RK_FUNC_2 &pcfg_pull_up>,
--						<3 4 RK_FUNC_2 &pcfg_pull_up>,
--						<3 5 RK_FUNC_2 &pcfg_pull_up>,
--						<3 6 RK_FUNC_2 &pcfg_pull_up>,
--						<3 7 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>,
-+						<3 RK_PA1 2 &pcfg_pull_up>,
-+						<3 RK_PA2 2 &pcfg_pull_up>,
-+						<3 RK_PA3 2 &pcfg_pull_up>,
-+						<3 RK_PA4 2 &pcfg_pull_up>,
-+						<3 RK_PA5 2 &pcfg_pull_up>,
-+						<3 RK_PA6 2 &pcfg_pull_up>,
-+						<3 RK_PA7 2 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		spi0 {
- 			spi0_clk: spi0-clk {
--				rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB4 1 &pcfg_pull_up>;
- 			};
- 			spi0_cs0: spi0-cs0 {
--				rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB5 1 &pcfg_pull_up>;
- 			};
- 			spi0_tx: spi0-tx {
--				rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB6 1 &pcfg_pull_up>;
- 			};
- 			spi0_rx: spi0-rx {
--				rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB7 1 &pcfg_pull_up>;
- 			};
- 			spi0_cs1: spi0-cs1 {
--				rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PC0 1 &pcfg_pull_up>;
- 			};
- 		};
- 		spi1 {
- 			spi1_clk: spi1-clk {
--				rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <7 RK_PB4 2 &pcfg_pull_up>;
- 			};
- 			spi1_cs0: spi1-cs0 {
--				rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <7 RK_PB5 2 &pcfg_pull_up>;
- 			};
- 			spi1_rx: spi1-rx {
--				rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <7 RK_PB6 2 &pcfg_pull_up>;
- 			};
- 			spi1_tx: spi1-tx {
--				rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>;
-+				rockchip,pins = <7 RK_PB7 2 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		spi2 {
- 			spi2_cs1: spi2-cs1 {
--				rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <8 RK_PA3 1 &pcfg_pull_up>;
- 			};
- 			spi2_clk: spi2-clk {
--				rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <8 RK_PA6 1 &pcfg_pull_up>;
- 			};
- 			spi2_cs0: spi2-cs0 {
--				rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <8 RK_PA7 1 &pcfg_pull_up>;
- 			};
- 			spi2_rx: spi2-rx {
--				rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <8 RK_PB0 1 &pcfg_pull_up>;
- 			};
- 			spi2_tx: spi2-tx {
--				rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <8 RK_PB1 1 &pcfg_pull_up>;
- 			};
- 		};
- 
- 		uart0 {
- 			uart0_xfer: uart0-xfer {
--				rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>,
--						<4 17 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <4 RK_PC0 1 &pcfg_pull_up>,
-+						<4 RK_PC1 1 &pcfg_pull_none>;
- 			};
- 
- 			uart0_cts: uart0-cts {
--				rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <4 RK_PC2 1 &pcfg_pull_up>;
- 			};
- 
- 			uart0_rts: uart0-rts {
--				rockchip,pins = <4 19 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <4 RK_PC3 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart1 {
- 			uart1_xfer: uart1-xfer {
--				rockchip,pins = <5 8 RK_FUNC_1 &pcfg_pull_up>,
--						<5 9 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <5 RK_PB0 1 &pcfg_pull_up>,
-+						<5 RK_PB1 1 &pcfg_pull_none>;
- 			};
- 
- 			uart1_cts: uart1-cts {
--				rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB2 1 &pcfg_pull_up>;
- 			};
- 
- 			uart1_rts: uart1-rts {
--				rockchip,pins = <5 11 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <5 RK_PB3 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart2 {
- 			uart2_xfer: uart2-xfer {
--				rockchip,pins = <7 22 RK_FUNC_1 &pcfg_pull_up>,
--						<7 23 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC6 1 &pcfg_pull_up>,
-+						<7 RK_PC7 1 &pcfg_pull_none>;
- 			};
- 			/* no rts / cts for uart2 */
- 		};
- 
- 		uart3 {
- 			uart3_xfer: uart3-xfer {
--				rockchip,pins = <7 7 RK_FUNC_1 &pcfg_pull_up>,
--						<7 8 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PA7 1 &pcfg_pull_up>,
-+						<7 RK_PB0 1 &pcfg_pull_none>;
- 			};
- 
- 			uart3_cts: uart3-cts {
--				rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_up>;
-+				rockchip,pins = <7 RK_PB1 1 &pcfg_pull_up>;
- 			};
- 
- 			uart3_rts: uart3-rts {
--				rockchip,pins = <7 10 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PB2 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		uart4 {
- 			uart4_xfer: uart4-xfer {
--				rockchip,pins = <5 15 3 &pcfg_pull_up>,
--						<5 14 3 &pcfg_pull_none>;
-+				rockchip,pins = <5 RK_PB7 3 &pcfg_pull_up>,
-+						<5 RK_PB6 3 &pcfg_pull_none>;
- 			};
- 
- 			uart4_cts: uart4-cts {
--				rockchip,pins = <5 12 3 &pcfg_pull_up>;
-+				rockchip,pins = <5 RK_PB4 3 &pcfg_pull_up>;
- 			};
- 
- 			uart4_rts: uart4-rts {
--				rockchip,pins = <5 13 3 &pcfg_pull_none>;
-+				rockchip,pins = <5 RK_PB5 3 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		tsadc {
- 			otp_gpio: otp-gpio {
--				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- 			};
- 
- 			otp_out: otp-out {
--				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm0 {
- 			pwm0_pin: pwm0-pin {
--				rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PA0 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm1 {
- 			pwm1_pin: pwm1-pin {
--				rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PA1 1 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm2 {
- 			pwm2_pin: pwm2-pin {
--				rockchip,pins = <7 22 3 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC6 3 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		pwm3 {
- 			pwm3_pin: pwm3-pin {
--				rockchip,pins = <7 23 3 &pcfg_pull_none>;
-+				rockchip,pins = <7 RK_PC7 3 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		gmac {
- 			rgmii_pins: rgmii-pins {
--				rockchip,pins = <3 30 3 &pcfg_pull_none>,
--						<3 31 3 &pcfg_pull_none>,
--						<3 26 3 &pcfg_pull_none>,
--						<3 27 3 &pcfg_pull_none>,
--						<3 28 3 &pcfg_pull_none_12ma>,
--						<3 29 3 &pcfg_pull_none_12ma>,
--						<3 24 3 &pcfg_pull_none_12ma>,
--						<3 25 3 &pcfg_pull_none_12ma>,
--						<4 0 3 &pcfg_pull_none>,
--						<4 5 3 &pcfg_pull_none>,
--						<4 6 3 &pcfg_pull_none>,
--						<4 9 3 &pcfg_pull_none_12ma>,
--						<4 4 3 &pcfg_pull_none_12ma>,
--						<4 1 3 &pcfg_pull_none>,
--						<4 3 3 &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>,
-+						<3 RK_PD7 3 &pcfg_pull_none>,
-+						<3 RK_PD2 3 &pcfg_pull_none>,
-+						<3 RK_PD3 3 &pcfg_pull_none>,
-+						<3 RK_PD4 3 &pcfg_pull_none_12ma>,
-+						<3 RK_PD5 3 &pcfg_pull_none_12ma>,
-+						<3 RK_PD0 3 &pcfg_pull_none_12ma>,
-+						<3 RK_PD1 3 &pcfg_pull_none_12ma>,
-+						<4 RK_PA0 3 &pcfg_pull_none>,
-+						<4 RK_PA5 3 &pcfg_pull_none>,
-+						<4 RK_PA6 3 &pcfg_pull_none>,
-+						<4 RK_PB1 3 &pcfg_pull_none_12ma>,
-+						<4 RK_PA4 3 &pcfg_pull_none_12ma>,
-+						<4 RK_PA1 3 &pcfg_pull_none>,
-+						<4 RK_PA3 3 &pcfg_pull_none>;
- 			};
- 
- 			rmii_pins: rmii-pins {
--				rockchip,pins = <3 30 3 &pcfg_pull_none>,
--						<3 31 3 &pcfg_pull_none>,
--						<3 28 3 &pcfg_pull_none>,
--						<3 29 3 &pcfg_pull_none>,
--						<4 0 3 &pcfg_pull_none>,
--						<4 5 3 &pcfg_pull_none>,
--						<4 4 3 &pcfg_pull_none>,
--						<4 1 3 &pcfg_pull_none>,
--						<4 2 3 &pcfg_pull_none>,
--						<4 3 3 &pcfg_pull_none>;
-+				rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>,
-+						<3 RK_PD7 3 &pcfg_pull_none>,
-+						<3 RK_PD4 3 &pcfg_pull_none>,
-+						<3 RK_PD5 3 &pcfg_pull_none>,
-+						<4 RK_PA0 3 &pcfg_pull_none>,
-+						<4 RK_PA5 3 &pcfg_pull_none>,
-+						<4 RK_PA4 3 &pcfg_pull_none>,
-+						<4 RK_PA1 3 &pcfg_pull_none>,
-+						<4 RK_PA2 3 &pcfg_pull_none>,
-+						<4 RK_PA3 3 &pcfg_pull_none>;
- 			};
- 		};
- 
- 		spdif {
- 			spdif_tx: spdif-tx {
--				rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
-+				rockchip,pins = <6 RK_PB3 1 &pcfg_pull_none>;
- 			};
- 		};
- 	};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0022-ARM-dts-rockchip-Add-dynamic-power-coefficient-for-r.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0022-ARM-dts-rockchip-Add-dynamic-power-coefficient-for-r.patch
deleted file mode 100644
index 8d08512..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0022-ARM-dts-rockchip-Add-dynamic-power-coefficient-for-r.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From ac60c5e33df4ec2b69c7e3ebbc0ccf1557e7bd5e Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Thu, 11 Apr 2019 17:01:58 -0700
-Subject: [PATCH 22/54] ARM: dts: rockchip: Add dynamic-power-coefficient for
- rk3288
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The value was determined with the following method:
-
-- take CPUs 1-3 offline
-- for each OPP
-  - set cpufreq min and max freq to OPP freq
-  - start dhrystone benchmark
-  - measure CPU power consumption during 10s
-  - calculate Cx for OPPx
-    - Cx = (Px - P1) / (Vx²fx - V1²f1)          [1]
-      using the following units: mW / Ghz / V   [2]
-- C = avg(C2, ..., Cn)
-
-[1] see commit 4daa001a1773 ("arm64: dts: juno: Add cpu
-     dynamic-power-coefficient information")
-[2] https://patchwork.kernel.org/patch/10493615/#22158551
-
-FTR, these are the values for the different OPPs:
-
-freq (kHz)   	mV		Px (mW)		Cx
-
-126000		900		39
-216000		900		66		370
-312000		900		95		372
-408000		900		122		363
-600000		900		177		359
-696000		950		230		363
-816000		1000		297		361
-1008000		1050		404		362
-1200000		1100		528		362
-1416000		1200		770		377
-1512000		1300		984		385
-1608000		1350		1156		394
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288.dtsi | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 23e9c5253019..884957da8700 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -64,6 +64,7 @@
- 			#cooling-cells = <2>; /* min followed by max */
- 			clock-latency = <40000>;
- 			clocks = <&cru ARMCLK>;
-+			dynamic-power-coefficient = <370>;
- 		};
- 		cpu1: cpu@501 {
- 			device_type = "cpu";
-@@ -74,6 +75,7 @@
- 			#cooling-cells = <2>; /* min followed by max */
- 			clock-latency = <40000>;
- 			clocks = <&cru ARMCLK>;
-+			dynamic-power-coefficient = <370>;
- 		};
- 		cpu2: cpu@502 {
- 			device_type = "cpu";
-@@ -84,6 +86,7 @@
- 			#cooling-cells = <2>; /* min followed by max */
- 			clock-latency = <40000>;
- 			clocks = <&cru ARMCLK>;
-+			dynamic-power-coefficient = <370>;
- 		};
- 		cpu3: cpu@503 {
- 			device_type = "cpu";
-@@ -94,6 +97,7 @@
- 			#cooling-cells = <2>; /* min followed by max */
- 			clock-latency = <40000>;
- 			clocks = <&cru ARMCLK>;
-+			dynamic-power-coefficient = <370>;
- 		};
- 	};
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0023-ARM-dts-rockchip-Add-DDR-retention-poweroff-to-rk328.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0023-ARM-dts-rockchip-Add-DDR-retention-poweroff-to-rk328.patch
deleted file mode 100644
index 1ff514e..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0023-ARM-dts-rockchip-Add-DDR-retention-poweroff-to-rk328.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 8a5deb4e316a5469f137e62eb1bbf6147ddbfd3d Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Thu, 11 Apr 2019 16:21:55 -0700
-Subject: [PATCH 23/54] ARM: dts: rockchip: Add DDR retention/poweroff to
- rk3288-veyron hogs
-
-Even though upstream Linux doesn't yet go into deep enough suspend to
-get DDR into self refresh, there is no harm in setting these pins up.
-They'll only actually do something if we go into a deeper suspend but
-leaving them configed always is fine.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 4 ++++
- arch/arm/boot/dts/rk3288-veyron.dtsi            | 4 ++++
- 2 files changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-index 72c4754032e9..b9cc90f0f25c 100644
---- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-@@ -229,6 +229,8 @@
- &pinctrl {
- 	pinctrl-0 = <
- 		/* Common for sleep and wake, but no owners */
-+		&ddr0_retention
-+		&ddrio_pwroff
- 		&global_pwroff
- 
- 		/* Wake only */
-@@ -236,6 +238,8 @@
- 	>;
- 	pinctrl-1 = <
- 		/* Common for sleep and wake, but no owners */
-+		&ddr0_retention
-+		&ddrio_pwroff
- 		&global_pwroff
- 
- 		/* Sleep only */
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index e4f0c00011f2..35755870bf66 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -453,10 +453,14 @@
- 	pinctrl-names = "default", "sleep";
- 	pinctrl-0 = <
- 		/* Common for sleep and wake, but no owners */
-+		&ddr0_retention
-+		&ddrio_pwroff
- 		&global_pwroff
- 	>;
- 	pinctrl-1 = <
- 		/* Common for sleep and wake, but no owners */
-+		&ddr0_retention
-+		&ddrio_pwroff
- 		&global_pwroff
- 	>;
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0024-ARM-dts-rockchip-vcc33_ccd-off-in-suspend-for-rk3288.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0024-ARM-dts-rockchip-vcc33_ccd-off-in-suspend-for-rk3288.patch
deleted file mode 100644
index 3becfcd..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0024-ARM-dts-rockchip-vcc33_ccd-off-in-suspend-for-rk3288.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From ed27ae71bf610004d04cb956d0a7687342006a1f Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Thu, 11 Apr 2019 16:21:56 -0700
-Subject: [PATCH 24/54] ARM: dts: rockchip: vcc33_ccd off in suspend for
- rk3288-veyron-chromebook
-
-As per my comments when the device tree for rk3288-veyron-chromebook
-first landed:
-
-> Technically I think vcc33_ccd can be off since we have
-> 'needs-reset-on-resume' down in the EHCI port (this regulator is for
-> the USB webcam that's connected to the EHCI port).
->
->  ...but leaving it on for now seems fine until we get suspend/resume
-> more solid.
-
-It's probably about time to do it right.
-
-[1] https://lore.kernel.org/linux-arm-kernel/CAD=FV=U37Yx8Mqk75_x05zxonvdc3qRMhqp8TyTDPWGHqSuRqg@mail.gmail.com/
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Elaine Zhang <zhangqing@rock-chips.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-index b9cc90f0f25c..fbef34578100 100644
---- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
-@@ -176,8 +176,7 @@
- 			regulator-min-microvolt = <3300000>;
- 			regulator-max-microvolt = <3300000>;
- 			regulator-state-mem {
--				regulator-on-in-suspend;
--				regulator-suspend-microvolt = <3300000>;
-+				regulator-off-in-suspend;
- 			};
- 		};
- 	};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0025-ARM-dts-rockchip-vdd_gpu-off-in-suspend-for-rk3288-v.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0025-ARM-dts-rockchip-vdd_gpu-off-in-suspend-for-rk3288-v.patch
deleted file mode 100644
index 3e7d4f3..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0025-ARM-dts-rockchip-vdd_gpu-off-in-suspend-for-rk3288-v.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 356150e86d75653d1f679c6ef583144b26d0a686 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Thu, 11 Apr 2019 16:21:57 -0700
-Subject: [PATCH 25/54] ARM: dts: rockchip: vdd_gpu off in suspend for
- rk3288-veyron
-
-At some point long long ago the downstream GPU driver would crash if
-we turned the GPU off during suspend.  For some context you can see:
-
-https://chromium-review.googlesource.com/#/c/215780/5..6/arch/arm/boot/dts/rk3288-pinky-rev2.dts
-
-At some point in time not too long after that got fixed.
-
-It's unclear why the GPU is left enabled during suspend on the
-mainline kernel.  Everything seems fine if I turn this off, so let's
-do it.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Elaine Zhang <zhangqing@rock-chips.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 35755870bf66..758fe225c702 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -219,8 +219,7 @@
- 				regulator-max-microvolt = <1250000>;
- 				regulator-ramp-delay = <6001>;
- 				regulator-state-mem {
--					regulator-on-in-suspend;
--					regulator-suspend-microvolt = <1000000>;
-+					regulator-off-in-suspend;
- 				};
- 			};
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0026-ARM-dts-rockchip-Hook-resets-up-to-USB-PHYs-on-rk328.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0026-ARM-dts-rockchip-Hook-resets-up-to-USB-PHYs-on-rk328.patch
deleted file mode 100644
index 032de51..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0026-ARM-dts-rockchip-Hook-resets-up-to-USB-PHYs-on-rk328.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From d17aa2d262e8574a8c6befb5b6470d1c32875cf8 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Tue, 16 Apr 2019 14:53:50 -0700
-Subject: [PATCH 26/54] ARM: dts: rockchip: Hook resets up to USB PHYs on
- rk3288.
-
-Let's hook up the resets to the three USB PHYs on rk3288 as per the
-bindings.  This is in preparation for a future patch that will set the
-"snps,reset-phy-on-wake" on the host port.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- arch/arm/boot/dts/rk3288.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index a024d1e7e74c..3f361fad4684 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -904,6 +904,8 @@
- 				clocks = <&cru SCLK_OTGPHY0>;
- 				clock-names = "phyclk";
- 				#clock-cells = <0>;
-+				resets = <&cru SRST_USBOTG_PHY>;
-+				reset-names = "phy-reset";
- 			};
- 
- 			usbphy1: usb-phy@334 {
-@@ -912,6 +914,8 @@
- 				clocks = <&cru SCLK_OTGPHY1>;
- 				clock-names = "phyclk";
- 				#clock-cells = <0>;
-+				resets = <&cru SRST_USBHOST0_PHY>;
-+				reset-names = "phy-reset";
- 			};
- 
- 			usbphy2: usb-phy@348 {
-@@ -920,6 +924,8 @@
- 				clocks = <&cru SCLK_OTGPHY2>;
- 				clock-names = "phyclk";
- 				#clock-cells = <0>;
-+				resets = <&cru SRST_USBHOST1_PHY>;
-+				reset-names = "phy-reset";
- 			};
- 		};
- 	};
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0027-ARM-dts-rockchip-Add-quirk-for-resetting-rk3288-s-dw.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0027-ARM-dts-rockchip-Add-quirk-for-resetting-rk3288-s-dw.patch
deleted file mode 100644
index 8ff2856..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0027-ARM-dts-rockchip-Add-quirk-for-resetting-rk3288-s-dw.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 5bdd614d65e314ac1530f9462c3ab955f3d3302b Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Tue, 16 Apr 2019 14:53:51 -0700
-Subject: [PATCH 27/54] ARM: dts: rockchip: Add quirk for resetting rk3288's
- dwc2 host on wakeup
-
-The "host" USB port on rk3288 has a hardware errata where we've got to
-assert a PHY reset whenever we see a remote wakeup.  Add that quirk
-property to the device tree.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- arch/arm/boot/dts/rk3288.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 3f361fad4684..8ce3dd2264b1 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -616,6 +616,7 @@
- 		dr_mode = "host";
- 		phys = <&usbphy2>;
- 		phy-names = "usb2-phy";
-+		snps,reset-phy-on-wake;
- 		status = "disabled";
- 	};
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0034-ARM-dts-raise-GPU-trip-point-temperature-for-speedy-.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0034-ARM-dts-raise-GPU-trip-point-temperature-for-speedy-.patch
deleted file mode 100644
index 91ab5d7..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0034-ARM-dts-raise-GPU-trip-point-temperature-for-speedy-.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From fa31ba8f1719149658f3cfc1e230c04b12c72efa Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Thu, 16 May 2019 09:29:42 -0700
-Subject: [PATCH 34/54] ARM: dts: raise GPU trip point temperature for speedy
- to 80 degC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Raise the temperature of the GPU thermal trip point for speedy
-to 80°C. This is the value used by the downstream Chrome OS 3.14
-kernel, the 'official' kernel for speedy.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-speedy.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-index aae37c535444..9a87017347ea 100644
---- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
-@@ -75,6 +75,10 @@
- 	force-hpd;
- };
- 
-+&gpu_alert0 {
-+	temperature = <80000>;
-+};
-+
- &gpu_crit {
- 	temperature = <90000>;
- };
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0035-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-min.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0035-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-min.patch
deleted file mode 100644
index fef0c4e..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0035-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-min.patch
+++ /dev/null
@@ -1,260 +0,0 @@
-From ca3516b32cd9e483685f6de5c9433d4913879f7e Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Tue, 21 May 2019 13:32:14 -0700
-Subject: [PATCH 35/54] ARM: dts: rockchip: Add pin names for
- rk3288-veyron-minnie
-
-We can now use the "gpio-line-names" property to provide the names for
-all the pins on a board.  Let's use this to provide the names for all
-the pins on rk3288-veyron-minnie.
-
-In general the names here come straight from the schematic.  That
-means even if the schematic name is weird / doesn't have consistent
-naming conventions / has typos I still haven't made any changes.
-
-The exception here is for two pins: the recovery switch and the write
-protect detection pin.  These two pins need to have standardized names
-since crossystem (a Chrome OS tool) uses these names to query the
-pins.  In downstream kernels crossystem used an out-of-tree driver to
-do this but it has now been moved to the gpiod API and needs the
-standardized names.
-
-It's expected that other rk3288-veyron boards will get similar patches
-shortly.
-
-NOTE: I have sorted the "gpio" section to be next to the "pinctrl"
-section since it seems to logically make the most sense there.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-minnie.dts | 212 +++++++++++++++++++++++++++++
- 1 file changed, 212 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-index ce57881625ec..a65099b4aef1 100644
---- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-@@ -184,6 +184,218 @@
- 	pinctrl-0 = <&vcc50_hdmi_en>;
- };
- 
-+&gpio0 {
-+	gpio-line-names = "PMIC_SLEEP_AP",
-+			  "DDRIO_PWROFF",
-+			  "DDRIO_RETEN",
-+			  "TS3A227E_INT_L",
-+			  "PMIC_INT_L",
-+			  "PWR_KEY_L",
-+			  "AP_LID_INT_L",
-+			  "EC_IN_RW",
-+
-+			  "AC_PRESENT_AP",
-+			  /*
-+			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
-+			   * it REC_MODE_L.
-+			   */
-+			  "RECOVERY_SW_L",
-+			  "OTP_OUT",
-+			  "HOST1_PWR_EN",
-+			  "USBOTG_PWREN_H",
-+			  "AP_WARM_RESET_H",
-+			  "nFALUT2",
-+			  "I2C0_SDA_PMIC",
-+
-+			  "I2C0_SCL_PMIC",
-+			  "SUSPEND_L",
-+			  "USB_INT";
-+};
-+
-+&gpio2 {
-+	gpio-line-names = "CONFIG0",
-+			  "CONFIG1",
-+			  "CONFIG2",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "CONFIG3",
-+
-+			  "PROCHOT#",
-+			  "EMMC_RST_L",
-+			  "",
-+			  "",
-+			  "BL_PWR_EN",
-+			  "AVDD_1V8_DISP_EN",
-+			  "TOUCH_INT",
-+			  "TOUCH_RST",
-+
-+			  "I2C3_SCL_TP",
-+			  "I2C3_SDA_TP";
-+};
-+
-+&gpio3 {
-+	gpio-line-names = "FLASH0_D0",
-+			  "FLASH0_D1",
-+			  "FLASH0_D2",
-+			  "FLASH0_D3",
-+			  "FLASH0_D4",
-+			  "FLASH0_D5",
-+			  "FLASH0_D6",
-+			  "FLASH0_D7",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "FLASH0_CS2/EMMC_CMD",
-+			  "",
-+			  "FLASH0_DQS/EMMC_CLKO";
-+};
-+
-+&gpio4 {
-+	gpio-line-names = "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "UART0_RXD",
-+			  "UART0_TXD",
-+			  "UART0_CTS",
-+			  "UART0_RTS",
-+			  "SDIO0_D0",
-+			  "SDIO0_D1",
-+			  "SDIO0_D2",
-+			  "SDIO0_D3",
-+
-+			  "SDIO0_CMD",
-+			  "SDIO0_CLK",
-+			  "dev_wake",
-+			  "",
-+			  "WIFI_ENABLE_H",
-+			  "BT_ENABLE_L",
-+			  "WIFI_HOST_WAKE",
-+			  "BT_HOST_WAKE";
-+};
-+
-+&gpio5 {
-+	gpio-line-names = "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "",
-+			  "",
-+			  "Volum_Up#",
-+			  "Volum_Down#",
-+			  "SPI0_CLK",
-+			  "SPI0_CS0",
-+			  "SPI0_TXD",
-+			  "SPI0_RXD",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "VCC50_HDMI_EN";
-+};
-+
-+&gpio6 {
-+	gpio-line-names = "I2S0_SCLK",
-+			  "I2S0_LRCK_RX",
-+			  "I2S0_LRCK_TX",
-+			  "I2S0_SDI",
-+			  "I2S0_SDO0",
-+			  "HP_DET_H",
-+			  "",
-+			  "INT_CODEC",
-+
-+			  "I2S0_CLK",
-+			  "I2C2_SDA",
-+			  "I2C2_SCL",
-+			  "MICDET",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "SDMMC_D0",
-+			  "SDMMC_D1",
-+			  "SDMMC_D2",
-+			  "SDMMC_D3",
-+			  "SDMMC_CLK",
-+			  "SDMMC_CMD";
-+};
-+
-+&gpio7 {
-+	gpio-line-names = "LCDC_BL",
-+			  "PWM_LOG",
-+			  "BL_EN",
-+			  "TRACKPAD_INT",
-+			  "TPM_INT_H",
-+			  "SDMMC_DET_L",
-+			  /*
-+			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
-+			   * it FW_WP_AP.
-+			   */
-+			  "AP_FLASH_WP_L",
-+			  "EC_INT",
-+
-+			  "CPU_NMI",
-+			  "DVS_OK",
-+			  "SDMMC_WP",
-+			  "EDP_HPD",
-+			  "DVS1",
-+			  "nFALUT1",
-+			  "LCD_EN",
-+			  "DVS2",
-+
-+			  "VCC5V_GOOD_H",
-+			  "I2C4_SDA_TP",
-+			  "I2C4_SCL_TP",
-+			  "I2C5_SDA_HDMI",
-+			  "I2C5_SCL_HDMI",
-+			  "5V_DRV",
-+			  "UART2_RXD",
-+			  "UART2_TXD";
-+};
-+
-+&gpio8 {
-+	gpio-line-names = "RAM_ID0",
-+			  "RAM_ID1",
-+			  "RAM_ID2",
-+			  "RAM_ID3",
-+			  "I2C1_SDA_TPM",
-+			  "I2C1_SCL_TPM",
-+			  "SPI2_CLK",
-+			  "SPI2_CS0",
-+
-+			  "SPI2_RXD",
-+			  "SPI2_TXD";
-+};
-+
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0036-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-jer.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0036-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-jer.patch
deleted file mode 100644
index e1136fe..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0036-ARM-dts-rockchip-Add-pin-names-for-rk3288-veyron-jer.patch
+++ /dev/null
@@ -1,237 +0,0 @@
-From 0ca87bd5baa62e5734800ee63e3a6301c90e8613 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Tue, 21 May 2019 13:32:15 -0700
-Subject: [PATCH 36/54] ARM: dts: rockchip: Add pin names for
- rk3288-veyron-jerry
-
-This is like the same change for rk3288-veyron-minnie.  See that patch
-for more details.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-jerry.dts | 207 ++++++++++++++++++++++++++++++
- 1 file changed, 207 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-index b1613af83d5d..164561f04c1d 100644
---- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
-@@ -103,6 +103,213 @@
- 	pinctrl-0 = <&vcc50_hdmi_en>;
- };
- 
-+&gpio0 {
-+	gpio-line-names = "PMIC_SLEEP_AP",
-+			  "DDRIO_PWROFF",
-+			  "DDRIO_RETEN",
-+			  "TS3A227E_INT_L",
-+			  "PMIC_INT_L",
-+			  "PWR_KEY_L",
-+			  "AP_LID_INT_L",
-+			  "EC_IN_RW",
-+
-+			  "AC_PRESENT_AP",
-+			  /*
-+			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
-+			   * it REC_MODE_L.
-+			   */
-+			  "RECOVERY_SW_L",
-+			  "OTP_OUT",
-+			  "HOST1_PWR_EN",
-+			  "USBOTG_PWREN_H",
-+			  "AP_WARM_RESET_H",
-+			  "nFAULT2",
-+			  "I2C0_SDA_PMIC",
-+
-+			  "I2C0_SCL_PMIC",
-+			  "SUSPEND_L",
-+			  "USB_INT";
-+};
-+
-+&gpio2 {
-+	gpio-line-names = "CONFIG0",
-+			  "CONFIG1",
-+			  "CONFIG2",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "CONFIG3",
-+
-+			  "",
-+			  "EMMC_RST_L",
-+			  "",
-+			  "",
-+			  "BL_PWR_EN",
-+			  "AVDD_1V8_DISP_EN";
-+};
-+
-+&gpio3 {
-+	gpio-line-names = "FLASH0_D0",
-+			  "FLASH0_D1",
-+			  "FLASH0_D2",
-+			  "FLASH0_D3",
-+			  "FLASH0_D4",
-+			  "FLASH0_D5",
-+			  "FLASH0_D6",
-+			  "FLASH0_D7",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "FLASH0_CS2/EMMC_CMD",
-+			  "",
-+			  "FLASH0_DQS/EMMC_CLKO";
-+};
-+
-+&gpio4 {
-+	gpio-line-names = "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "UART0_RXD",
-+			  "UART0_TXD",
-+			  "UART0_CTS",
-+			  "UART0_RTS",
-+			  "SDIO0_D0",
-+			  "SDIO0_D1",
-+			  "SDIO0_D2",
-+			  "SDIO0_D3",
-+
-+			  "SDIO0_CMD",
-+			  "SDIO0_CLK",
-+			  "BT_DEV_WAKE",
-+			  "",
-+			  "WIFI_ENABLE_H",
-+			  "BT_ENABLE_L",
-+			  "WIFI_HOST_WAKE",
-+			  "BT_HOST_WAKE";
-+};
-+
-+&gpio5 {
-+	gpio-line-names = "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+			  "SPI0_CLK",
-+			  "SPI0_CS0",
-+			  "SPI0_TXD",
-+			  "SPI0_RXD",
-+
-+			  "",
-+			  "",
-+			  "",
-+			  "VCC50_HDMI_EN";
-+};
-+
-+&gpio6 {
-+	gpio-line-names = "I2S0_SCLK",
-+			  "I2S0_LRCK_RX",
-+			  "I2S0_LRCK_TX",
-+			  "I2S0_SDI",
-+			  "I2S0_SDO0",
-+			  "HP_DET_H",
-+			  "",
-+			  "INT_CODEC",
-+
-+			  "I2S0_CLK",
-+			  "I2C2_SDA",
-+			  "I2C2_SCL",
-+			  "MICDET",
-+			  "",
-+			  "",
-+			  "",
-+			  "",
-+
-+			  "SDMMC_D0",
-+			  "SDMMC_D1",
-+			  "SDMMC_D2",
-+			  "SDMMC_D3",
-+			  "SDMMC_CLK",
-+			  "SDMMC_CMD";
-+};
-+
-+&gpio7 {
-+	gpio-line-names = "LCDC_BL",
-+			  "PWM_LOG",
-+			  "BL_EN",
-+			  "TRACKPAD_INT",
-+			  "TPM_INT_H",
-+			  "SDMMC_DET_L",
-+			  /*
-+			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
-+			   * it FW_WP_AP.
-+			   */
-+			  "AP_FLASH_WP_L",
-+			  "EC_INT",
-+
-+			  "CPU_NMI",
-+			  "DVSOK",
-+			  "",
-+			  "EDP_HPD",
-+			  "DVS1",
-+			  "nFAULT1",
-+			  "LCD_EN",
-+			  "DVS2",
-+
-+			  "VCC5V_GOOD_H",
-+			  "I2C4_SDA_TP",
-+			  "I2C4_SCL_TP",
-+			  "I2C5_SDA_HDMI",
-+			  "I2C5_SCL_HDMI",
-+			  "5V_DRV",
-+			  "UART2_RXD",
-+			  "UART2_TXD";
-+};
-+
-+&gpio8 {
-+	gpio-line-names = "RAM_ID0",
-+			  "RAM_ID1",
-+			  "RAM_ID2",
-+			  "RAM_ID3",
-+			  "I2C1_SDA_TPM",
-+			  "I2C1_SCL_TPM",
-+			  "SPI2_CLK",
-+			  "SPI2_CS0",
-+
-+			  "SPI2_RXD",
-+			  "SPI2_TXD";
-+};
-+
- &pinctrl {
- 	backlight {
- 		bl_pwr_en: bl_pwr_en {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0041-ARM-dts-rockchip-Use-the-GPU-to-cool-CPU-thermal-zon.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0041-ARM-dts-rockchip-Use-the-GPU-to-cool-CPU-thermal-zon.patch
deleted file mode 100644
index 3f032b9..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0041-ARM-dts-rockchip-Use-the-GPU-to-cool-CPU-thermal-zon.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 11983d8530e3d4e9cdd9e5cb7c23611adaf67c73 Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Mon, 20 May 2019 15:00:50 -0700
-Subject: [PATCH 41/54] ARM: dts: rockchip: Use the GPU to cool CPU thermal
- zone of veyron mickey
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On rk3288 the CPU and GPU temperatures are correlated. Limit the GPU
-frequency on veyron mickey to 400 MHz for CPU temperatures >= 65°C
-and to 300 MHz for CPU temperatures >= 85°C.
-
-This matches the configuration of the downstream Chrome OS 3.14 kernel,
-the 'official' kernel for mickey.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-mickey.dts | 14 +++++++++++---
- 1 file changed, 11 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-index 52f6abc22291..34797abe3403 100644
---- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-@@ -75,9 +75,7 @@
- 	cooling-maps {
- 		/*
- 		 * After 1st level, throttle the CPU down to as low as 1.4 GHz
--		 * and don't let the GPU go faster than 400 MHz.  Note that we
--		 * won't throttle the GPU lower than 400 MHz due to CPU
--		 * heat--we'll let the GPU do the rest itself.
-+		 * and don't let the GPU go faster than 400 MHz.
- 		 */
- 		cpu_warm_limit_cpu {
- 			trip = <&cpu_alert_warm>;
-@@ -86,6 +84,10 @@
- 					 <&cpu2 THERMAL_NO_LIMIT 4>,
- 					 <&cpu3 THERMAL_NO_LIMIT 4>;
- 		};
-+		cpu_warm_limit_gpu {
-+			trip = <&cpu_alert_warm>;
-+			cooling-device = <&gpu 1 1>;
-+		};
- 
- 		/*
- 		 * Add some discrete steps to help throttling system deal
-@@ -125,6 +127,12 @@
- 					 <&cpu2 8 THERMAL_NO_LIMIT>,
- 					 <&cpu3 8 THERMAL_NO_LIMIT>;
- 		};
-+
-+		/* At very hot, don't let GPU go over 300 MHz */
-+		cpu_very_hot_limit_gpu {
-+			trip = <&cpu_alert_very_hot>;
-+			cooling-device = <&gpu 2 2>;
-+		};
- 	};
- };
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0042-ARM-dts-rockchip-Configure-the-GPU-thermal-zone-for-.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0042-ARM-dts-rockchip-Configure-the-GPU-thermal-zone-for-.patch
deleted file mode 100644
index a4d0cfa..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0042-ARM-dts-rockchip-Configure-the-GPU-thermal-zone-for-.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From c87efcc3d1dfdf3f5ecb6558521825a21838dc30 Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Mon, 20 May 2019 15:00:51 -0700
-Subject: [PATCH 42/54] ARM: dts: rockchip: Configure the GPU thermal zone for
- mickey
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-mickey crams a lot of hardware into a tiny package, which requires
-more aggressive thermal throttling than for devices with a larger
-footprint. Configure the GPU thermal zone to throttle the GPU
-progressively at temperatures >= 60°C. Heat dissipated by the
-CPUs also affects the GPU temperature, hence we cap the CPU
-frequency to 1.4 GHz for temperatures above 65°C. Further throttling
-of the CPUs may be performed by the CPU thermal zone.
-
-The configuration matches that of the downstream Chrome OS 3.14
-kernel, the 'official' kernel for mickey.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-mickey.dts | 67 ++++++++++++++++++++++++++++++
- 1 file changed, 67 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-index 34797abe3403..945e80801292 100644
---- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
-@@ -136,6 +136,73 @@
- 	};
- };
- 
-+&gpu_thermal {
-+	/delete-node/ trips;
-+	/delete-node/ cooling-maps;
-+
-+	trips {
-+		gpu_alert_warmish: gpu_alert_warmish {
-+			temperature = <60000>; /* millicelsius */
-+			hysteresis = <2000>; /* millicelsius */
-+			type = "passive";
-+		};
-+		gpu_alert_warm: gpu_alert_warm {
-+			temperature = <65000>; /* millicelsius */
-+			hysteresis = <2000>; /* millicelsius */
-+			type = "passive";
-+		};
-+		gpu_alert_hotter: gpu_alert_hotter {
-+			temperature = <84000>; /* millicelsius */
-+			hysteresis = <2000>; /* millicelsius */
-+			type = "passive";
-+		};
-+		gpu_alert_very_very_hot: gpu_alert_very_very_hot {
-+			temperature = <86000>; /* millicelsius */
-+			hysteresis = <2000>; /* millicelsius */
-+			type = "passive";
-+		};
-+		gpu_crit: gpu_crit {
-+			temperature = <90000>; /* millicelsius */
-+			hysteresis = <2000>; /* millicelsius */
-+			type = "critical";
-+		};
-+	};
-+
-+	cooling-maps {
-+		/* After 1st level throttle the GPU down to as low as 400 MHz */
-+		gpu_warmish_limit_gpu {
-+			trip = <&gpu_alert_warmish>;
-+			cooling-device = <&gpu THERMAL_NO_LIMIT 1>;
-+		};
-+
-+		/*
-+		 * Slightly after we throttle the GPU, we'll also make sure that
-+		 * the CPU can't go faster than 1.4 GHz.  Note that we won't
-+		 * throttle the CPU lower than 1.4 GHz due to GPU heat--we'll
-+		 * let the CPU do the rest itself.
-+		 */
-+		gpu_warm_limit_cpu {
-+			trip = <&gpu_alert_warm>;
-+			cooling-device = <&cpu0 4 4>,
-+					 <&cpu1 4 4>,
-+					 <&cpu2 4 4>,
-+					 <&cpu3 4 4>;
-+		};
-+
-+		/* When hot, GPU goes down to 300 MHz */
-+		gpu_hotter_limit_gpu {
-+			trip = <&gpu_alert_hotter>;
-+			cooling-device = <&gpu 2 2>;
-+		};
-+
-+		/* When really hot, don't let GPU go _above_ 300 MHz */
-+		gpu_very_very_hot_limit_gpu {
-+			trip = <&gpu_alert_very_very_hot>;
-+			cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
-+		};
-+	};
-+};
-+
- &i2c2 {
- 	status = "disabled";
- };
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0047-ARM-dts-rockchip-Add-HDMI-i2c-unwedging-for-rk3288-v.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0047-ARM-dts-rockchip-Add-HDMI-i2c-unwedging-for-rk3288-v.patch
deleted file mode 100644
index cf78a91..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0047-ARM-dts-rockchip-Add-HDMI-i2c-unwedging-for-rk3288-v.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From cd6386087d826b9421ed97b778676f4177ffdfbd Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Thu, 2 May 2019 15:53:36 -0700
-Subject: [PATCH 47/54] ARM: dts: rockchip: Add HDMI i2c unwedging for
- rk3288-veyron
-
-Veyron uses the builtin i2c controller that's part of dw-hdmi.  Hook
-up the unwedging feature.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-by: Sean Paul <sean@poorly.run>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 99e2771d4d31..c574844a6bb2 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -175,8 +175,9 @@
- };
- 
- &hdmi {
--	pinctrl-names = "default";
-+	pinctrl-names = "default", "unwedge";
- 	pinctrl-0 = <&hdmi_ddc>;
-+	pinctrl-1 = <&hdmi_ddc_unwedge>;
- 	status = "okay";
- };
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0049-ARM-dts-rockchip-Configure-BT_HOST_WAKE-as-wake-up-s.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0049-ARM-dts-rockchip-Configure-BT_HOST_WAKE-as-wake-up-s.patch
deleted file mode 100644
index 52c815a..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0049-ARM-dts-rockchip-Configure-BT_HOST_WAKE-as-wake-up-s.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From f497ab6b4bb813aca439b7f3a72a060b58b147c4 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Mon, 10 Jun 2019 16:51:44 -0700
-Subject: [PATCH 49/54] ARM: dts: rockchip: Configure BT_HOST_WAKE as wake-up
- signal on veyron
-
-This enables wake up on Bluetooth activity when the device is
-suspended. The BT_HOST_WAKE signal is only connected on devices
-with BT module that are connected through UART.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 29 +++++++++++++++++++++++++++++
- 1 file changed, 29 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 3257ca90f0e8..e2635ad574e7 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -23,6 +23,31 @@
- 		reg = <0x0 0x0 0x0 0x80000000>;
- 	};
- 
-+	bt_activity: bt-activity {
-+		compatible = "gpio-keys";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&bt_host_wake>;
-+
-+		/*
-+		 * HACK: until we have an LPM driver, we'll use an
-+		 * ugly GPIO key to allow Bluetooth to wake from S3.
-+		 * This is expected to only be used by BT modules that
-+		 * use UART for comms.  For BT modules that talk over
-+		 * SDIO we should use a wakeup mechanism related to SDIO.
-+		 *
-+		 * Use KEY_RESERVED here since that will work as a wakeup but
-+		 * doesn't get reported to higher levels (so doesn't confuse
-+		 * Chrome).
-+		 */
-+		bt-wake {
-+			label = "BT Wakeup";
-+			gpios = <&gpio4 RK_PD7 GPIO_ACTIVE_HIGH>;
-+			linux,code = <KEY_RESERVED>;
-+			wakeup-source;
-+		};
-+
-+	};
-+
- 	power_button: power-button {
- 		compatible = "gpio-keys";
- 		pinctrl-names = "default";
-@@ -549,6 +574,10 @@
- 			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 
-+		bt_host_wake: bt-host-wake {
-+			rockchip,pins = <4 RK_PD7 RK_FUNC_GPIO &pcfg_pull_down>;
-+		};
-+
- 		/*
- 		 * We run sdio0 at max speed; bump up drive strength.
- 		 * We also have external pulls, so disable the internal ones.
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/DTS/5.x-dts/0052-Revert-ARM-dts-rockchip-set-PWM-delay-backlight-sett.patch b/resources/BuildResources/patches-tested/DTS/5.x-dts/0052-Revert-ARM-dts-rockchip-set-PWM-delay-backlight-sett.patch
deleted file mode 100644
index 9ba8ec9..0000000
--- a/resources/BuildResources/patches-tested/DTS/5.x-dts/0052-Revert-ARM-dts-rockchip-set-PWM-delay-backlight-sett.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From fe32553c8704fe15effd6945afd5de893d417a80 Mon Sep 17 00:00:00 2001
-From: Matthias Kaehlcke <mka@chromium.org>
-Date: Tue, 18 Jun 2019 11:45:31 -0700
-Subject: [PATCH 52/54] Revert "ARM: dts: rockchip: set PWM delay backlight
- settings for Minnie"
-
-This reverts commit 288ceb85b505c19abe1895df068dda5ed20cf482.
-
-The commit assumes that the minnie panel is a AUO B101EAN01.1 (LVDS
-interface), however it is a AUO B101EAN01.8 (eDP interface). The eDP
-panel doesn't need the 200 ms delay.
-
-Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
-Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm/boot/dts/rk3288-veyron-minnie.dts | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-index b2cc70a08554..9008e703c07e 100644
---- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
-@@ -106,8 +106,6 @@
- 			240 241 242 243 244 245 246 247
- 			248 249 250 251 252 253 254 255>;
- 	power-supply = <&backlight_regulator>;
--	post-pwm-on-delay-ms = <200>;
--	pwm-off-delay-ms = <200>;
- };
- 
- &i2c_tunnel {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/0030-cros-ec-check-for-mkbp-events-on-resume-only-if-supported.patch b/resources/BuildResources/patches-tested/kernel/0030-cros-ec-check-for-mkbp-events-on-resume-only-if-supported.patch
deleted file mode 100644
index 93461c1..0000000
--- a/resources/BuildResources/patches-tested/kernel/0030-cros-ec-check-for-mkbp-events-on-resume-only-if-supported.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-commit	987775dbc2ad01135e429a2ba102d26515f45a3b	[log] [tgz]
-author	RaviChandra Sadineni <ravisadineni@chromium.org>	Mon Aug 20 15:34:19 2018
-committer	chrome-bot <chrome-bot@chromium.org>	Wed Apr 03 19:28:35 2019
-tree	1d07649cd5eb868676b3d6c21be4db64f6e4d36f
-parent	e68bb06b8ad62d1bd5d7081ba58e2c765ee7cb20 [diff]
-
-UPSTREAM: mfd: cros_ec: Check for mkbp events on resume only if supported.
-
-Currently on every resume we check for mkbp events and notify the
-clients. This helps in identifying the wakeup sources. But on devices
-that do not support mkbp protocol, we might end up querying key state of
-the keyboard in a loop which blocks the resume. Instead check for events
-only if mkbp is supported.
-
-Signed-off-by: RaviChandra Sadineni <ravisadineni@chromium.org>
-Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
-(cherry picked from commit 61cc15dac01ae84281222452e338ca060179d8b1)
-
-BUG=chromium:941638
-TEST=Suspend/resume doesn't hang anymore
-
-Change-Id: I3914077c8feae2025ed98443b8ea2f958160a3e6
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Reviewed-on: https://chromium-review.googlesource.com/1549746
-Reviewed-by: Sean Paul <seanpaul@chromium.org>
-Reviewed-by: Ravi Chandra Sadineni <ravisadineni@chromium.org>
-
-diff --git a/drivers/mfd/cros_ec.c b/drivers/mfd/cros_ec.c
-index f4ad853..02774d9 100644
---- a/drivers/mfd/cros_ec.c
-+++ b/drivers/mfd/cros_ec.c
-
-@@ -225,7 +225,8 @@
- 
- static void cros_ec_report_events_during_suspend(struct cros_ec_device *ec_dev)
- {
--	while (cros_ec_get_next_event(ec_dev, NULL) > 0)
-+	while (ec_dev->mkbp_event_supported &&
-+	       cros_ec_get_next_event(ec_dev, NULL) > 0)
- 		blocking_notifier_call_chain(&ec_dev->event_notifier,
- 					     1, ec_dev);
- }
-
diff --git a/resources/BuildResources/patches-tested/kernel/0101-arm-errata-add-support-for-A12-and-A17-errata-CR711784.patch b/resources/BuildResources/patches-tested/kernel/0101-arm-errata-add-support-for-A12-and-A17-errata-CR711784.patch
deleted file mode 100644
index 0bf1786..0000000
--- a/resources/BuildResources/patches-tested/kernel/0101-arm-errata-add-support-for-A12-and-A17-errata-CR711784.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-[2/2] ARM: errata: add support for A12/A17 errata CR711784 
-
-This adds a code for turning on chicken bit 11, which appears to avoid
-a potential CPU deadlock that could occur.  The exact set of
-instruction needed to trigger this errata is not totaly known but we
-have a high level of confidence that the problem is fixed by setting
-chicken bit 11.
-
-All details are in http://crbug.com/711784
-
-This erratum has no known number and thus I have tagged it CR711784
-(after the Chrome OS bug number).  I have created separate A12 / A17
-configs to match how the rest of the A12 / A17 errata is handled.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
----
-
- arch/arm/Kconfig      | 18 ++++++++++++++++++
- arch/arm/mm/proc-v7.S | 10 ++++++++++
- 2 files changed, 28 insertions(+)
-
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 4376fe74f95e..34ec9039206b 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1181,6 +1181,13 @@  config ARM_ERRATA_857271
- 	  hang. The workaround is expected to have a negligible performance
- 	  impact.
- 
-+config ARM_ERRATA_CR711784_A12
-+	bool "ARM errata: A12: conditional instructions can lead to a CPU hang"
-+	depends on CPU_V7
-+	help
-+	  This option enables the workaround for a Cortex-A12 erratum without a
-+	  number. The problems are best described in https://crbug.com/711784
-+
- config ARM_ERRATA_852421
- 	bool "ARM errata: A17: DMB ST might fail to create order between stores"
- 	depends on CPU_V7
-@@ -1212,6 +1219,17 @@  config ARM_ERRATA_857272
- 	  config option from the A12 erratum due to the way errata are checked
- 	  for and handled.
- 
-+config ARM_ERRATA_CR711784_A17
-+	bool "ARM errata: A17: conditional instructions can lead to a CPU hang"
-+	depends on CPU_V7
-+	help
-+	  This option enables the workaround for a Cortex-A17 erratum without a
-+	  number. The problems are best described in https://crbug.com/711784
-+	  This erratum is not known to be fixed in any A17 revision.
-+	  This is identical to Cortex-A12 erratum CR711784.  It is a separate
-+	  config option from the A12 erratum due to the way errata are checked
-+	  for and handled.
-+
- endmenu
- 
- source "arch/arm/common/Kconfig"
-diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
-index cd2accbab844..a5156ea734ee 100644
---- a/arch/arm/mm/proc-v7.S
-+++ b/arch/arm/mm/proc-v7.S
-@@ -396,6 +396,11 @@  __ca12_errata:
- 	mrc	p15, 0, r10, c15, c0, 1		@ read diagnostic register
- 	orr	r10, r10, #1 << 10		@ set bit #10
- 	mcr	p15, 0, r10, c15, c0, 1		@ write diagnostic register
-+#endif
-+#ifdef CONFIG_ARM_ERRATA_CR711784_A12
-+	mrc	p15, 0, r10, c15, c0, 1		@ read diagnostic register
-+	orr	r10, r10, #1 << 11		@ set bit #11
-+	mcr	p15, 0, r10, c15, c0, 1		@ write diagnostic register
- #endif
- 	b	__errata_finish
- 
-@@ -416,6 +421,11 @@  __ca17_errata:
- 	mrc	p15, 0, r10, c15, c0, 1		@ read diagnostic register
- 	orr	r10, r10, #1 << 10		@ set bit #10
- 	mcr	p15, 0, r10, c15, c0, 1		@ write diagnostic register
-+#endif
-+#ifdef CONFIG_ARM_ERRATA_CR711784_A17
-+	mrc	p15, 0, r10, c15, c0, 1		@ read diagnostic register
-+	orr	r10, r10, #1 << 11		@ set bit #11
-+	mcr	p15, 0, r10, c15, c0, 1		@ write diagnostic register
- #endif
- 	b	__errata_finish
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-clk/0001-clk-Tag-clk-core-files-with-SPDX.patch b/resources/BuildResources/patches-tested/kernel/5.x-clk/0001-clk-Tag-clk-core-files-with-SPDX.patch
deleted file mode 100644
index cd19a68..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-clk/0001-clk-Tag-clk-core-files-with-SPDX.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From ebafb63dc7759c4cc54065b5aa675080b5f453ce Mon Sep 17 00:00:00 2001
-From: Stephen Boyd <sboyd@kernel.org>
-Date: Tue, 11 Dec 2018 09:43:03 -0800
-Subject: [PATCH 1/3] clk: Tag clk core files with SPDX
-
-These are all GPL-2.0 files per the existing license text. Replace the
-boiler plate with the tag.
-
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/clk-devres.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
-index 12c87457eca1..c9a86156ced8 100644
---- a/drivers/clk/clk-devres.c
-+++ b/drivers/clk/clk-devres.c
-@@ -1,9 +1,4 @@
--/*
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--
-+// SPDX-License-Identifier: GPL-2.0
- #include <linux/clk.h>
- #include <linux/device.h>
- #include <linux/export.h>
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-clk/0002-clk-Add-devm_-clk_get_optional-functions.patch b/resources/BuildResources/patches-tested/kernel/5.x-clk/0002-clk-Add-devm_-clk_get_optional-functions.patch
deleted file mode 100644
index 1e00945..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-clk/0002-clk-Add-devm_-clk_get_optional-functions.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 60b8f0ddf1a927ef02141a6610fd52575134f821 Mon Sep 17 00:00:00 2001
-From: Phil Edworthy <phil.edworthy@renesas.com>
-Date: Mon, 3 Dec 2018 11:13:09 +0000
-Subject: [PATCH 2/3] clk: Add (devm_)clk_get_optional() functions
-
-This adds clk_get_optional() and devm_clk_get_optional() functions to get
-optional clocks.
-
-They behave the same as (devm_)clk_get() except where there is no clock
-producer. In this case, instead of returning -ENOENT, the function
-returns NULL. This makes error checking simpler and allows
-clk_prepare_enable, etc to be called on the returned reference
-without additional checks.
-
-Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
-Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Cc: Russell King <linux@armlinux.org.uk>
-[sboyd@kernel.org: Document in devres.txt]
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/clk-devres.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
-index c9a86156ced8..daa1fc8fba53 100644
---- a/drivers/clk/clk-devres.c
-+++ b/drivers/clk/clk-devres.c
-@@ -29,6 +29,17 @@ struct clk *devm_clk_get(struct device *dev, const char *id)
- }
- EXPORT_SYMBOL(devm_clk_get);
- 
-+struct clk *devm_clk_get_optional(struct device *dev, const char *id)
-+{
-+	struct clk *clk = devm_clk_get(dev, id);
-+
-+	if (clk == ERR_PTR(-ENOENT))
-+		return NULL;
-+
-+	return clk;
-+}
-+EXPORT_SYMBOL(devm_clk_get_optional);
-+
- struct clk_bulk_devres {
- 	struct clk_bulk_data *clks;
- 	int num_clks;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0002-usb-dwc2-get-optional-vbus-supply-regulator-once.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0002-usb-dwc2-get-optional-vbus-supply-regulator-once.patch
deleted file mode 100644
index 552c0d3..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0002-usb-dwc2-get-optional-vbus-supply-regulator-once.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From e0f681c2c11a25b76626cea77deb819a4754375d Mon Sep 17 00:00:00 2001
-From: Fabrice Gasnier <fabrice.gasnier@st.com>
-Date: Wed, 5 Sep 2018 13:40:02 +0200
-Subject: [PATCH 02/53] usb: dwc2: get optional vbus-supply regulator once
-
-Move devm_regulator_get_optional() call to probe routine. This avoids
-'vbus-supply' regulator to be requested lots of times, upon each call
-to dwc2_vbus_supply_init(), e.g. like with runtime pm.
-
-Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external
-vbus supply")
-
-Tested-by: Artur Petrosyan <arturp@synopsys.com>
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
-Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hcd.c      | 12 +++---------
- drivers/usb/dwc2/platform.c |  8 ++++++++
- 2 files changed, 11 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 5f23b933cafc..24aa5a3acf86 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -358,16 +358,10 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
- 
- static int dwc2_vbus_supply_init(struct dwc2_hsotg *hsotg)
- {
--	int ret;
--
--	hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
--	if (IS_ERR(hsotg->vbus_supply)) {
--		ret = PTR_ERR(hsotg->vbus_supply);
--		hsotg->vbus_supply = NULL;
--		return ret == -ENODEV ? 0 : ret;
--	}
-+	if (hsotg->vbus_supply)
-+		return regulator_enable(hsotg->vbus_supply);
- 
--	return regulator_enable(hsotg->vbus_supply);
-+	return 0;
- }
- 
- static int dwc2_vbus_supply_exit(struct dwc2_hsotg *hsotg)
-diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
-index 577642895b57..c0b64d483552 100644
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -432,6 +432,14 @@ static int dwc2_driver_probe(struct platform_device *dev)
- 	if (retval)
- 		return retval;
- 
-+	hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
-+	if (IS_ERR(hsotg->vbus_supply)) {
-+		retval = PTR_ERR(hsotg->vbus_supply);
-+		hsotg->vbus_supply = NULL;
-+		if (retval != -ENODEV)
-+			return retval;
-+	}
-+
- 	retval = dwc2_lowlevel_hw_enable(hsotg);
- 	if (retval)
- 		return retval;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0005-usb-dwc2-fix-unbalanced-use-of-external-vbus-supply.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0005-usb-dwc2-fix-unbalanced-use-of-external-vbus-supply.patch
deleted file mode 100644
index 23093a6..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0005-usb-dwc2-fix-unbalanced-use-of-external-vbus-supply.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From cd7cd0e6cedfda8da6668a4af6748f96bbb6fed4 Mon Sep 17 00:00:00 2001
-From: Fabrice Gasnier <fabrice.gasnier@st.com>
-Date: Wed, 5 Sep 2018 13:40:05 +0200
-Subject: [PATCH 05/53] usb: dwc2: fix unbalanced use of external vbus-supply
-
-When using external vbus supply regulator, it should be enabled
-synchronously with PWR bit in HPRT register. This also fixes
-unbalanced use of this optional regulator (This can be reproduced
-easily when unbinding the driver).
-
-Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external
-vbus supply")
-
-Tested-by: Artur Petrosyan <arturp@synopsys.com>
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
-Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hcd.c | 33 ++++++++++++++++++++++++++-------
- 1 file changed, 26 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 103a0521466b..dd82fa516f3f 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -3555,6 +3555,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
- 	u32 port_status;
- 	u32 speed;
- 	u32 pcgctl;
-+	u32 pwr;
- 
- 	switch (typereq) {
- 	case ClearHubFeature:
-@@ -3603,8 +3604,11 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
- 			dev_dbg(hsotg->dev,
- 				"ClearPortFeature USB_PORT_FEAT_POWER\n");
- 			hprt0 = dwc2_read_hprt0(hsotg);
-+			pwr = hprt0 & HPRT0_PWR;
- 			hprt0 &= ~HPRT0_PWR;
- 			dwc2_writel(hsotg, hprt0, HPRT0);
-+			if (pwr)
-+				dwc2_vbus_supply_exit(hsotg);
- 			break;
- 
- 		case USB_PORT_FEAT_INDICATOR:
-@@ -3814,8 +3818,11 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
- 			dev_dbg(hsotg->dev,
- 				"SetPortFeature - USB_PORT_FEAT_POWER\n");
- 			hprt0 = dwc2_read_hprt0(hsotg);
-+			pwr = hprt0 & HPRT0_PWR;
- 			hprt0 |= HPRT0_PWR;
- 			dwc2_writel(hsotg, hprt0, HPRT0);
-+			if (!pwr)
-+				dwc2_vbus_supply_init(hsotg);
- 			break;
- 
- 		case USB_PORT_FEAT_RESET:
-@@ -3832,6 +3839,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
- 			dwc2_writel(hsotg, 0, PCGCTL);
- 
- 			hprt0 = dwc2_read_hprt0(hsotg);
-+			pwr = hprt0 & HPRT0_PWR;
- 			/* Clear suspend bit if resetting from suspend state */
- 			hprt0 &= ~HPRT0_SUSP;
- 
-@@ -3845,6 +3853,8 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
- 				dev_dbg(hsotg->dev,
- 					"In host mode, hprt0=%08x\n", hprt0);
- 				dwc2_writel(hsotg, hprt0, HPRT0);
-+				if (!pwr)
-+					dwc2_vbus_supply_init(hsotg);
- 			}
- 
- 			/* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */
-@@ -4384,6 +4394,7 @@ static int _dwc2_hcd_start(struct usb_hcd *hcd)
- 	struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
- 	struct usb_bus *bus = hcd_to_bus(hcd);
- 	unsigned long flags;
-+	u32 hprt0;
- 	int ret;
- 
- 	dev_dbg(hsotg->dev, "DWC OTG HCD START\n");
-@@ -4400,12 +4411,16 @@ static int _dwc2_hcd_start(struct usb_hcd *hcd)
- 
- 	dwc2_hcd_reinit(hsotg);
- 
--	/* enable external vbus supply before resuming root hub */
--	spin_unlock_irqrestore(&hsotg->lock, flags);
--	ret = dwc2_vbus_supply_init(hsotg);
--	if (ret)
--		return ret;
--	spin_lock_irqsave(&hsotg->lock, flags);
-+	hprt0 = dwc2_read_hprt0(hsotg);
-+	/* Has vbus power been turned on in dwc2_core_host_init ? */
-+	if (hprt0 & HPRT0_PWR) {
-+		/* Enable external vbus supply before resuming root hub */
-+		spin_unlock_irqrestore(&hsotg->lock, flags);
-+		ret = dwc2_vbus_supply_init(hsotg);
-+		if (ret)
-+			return ret;
-+		spin_lock_irqsave(&hsotg->lock, flags);
-+	}
- 
- 	/* Initialize and connect root hub if one is not already attached */
- 	if (bus->root_hub) {
-@@ -4427,6 +4442,7 @@ static void _dwc2_hcd_stop(struct usb_hcd *hcd)
- {
- 	struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
- 	unsigned long flags;
-+	u32 hprt0;
- 
- 	/* Turn off all host-specific interrupts */
- 	dwc2_disable_host_interrupts(hsotg);
-@@ -4435,6 +4451,7 @@ static void _dwc2_hcd_stop(struct usb_hcd *hcd)
- 	synchronize_irq(hcd->irq);
- 
- 	spin_lock_irqsave(&hsotg->lock, flags);
-+	hprt0 = dwc2_read_hprt0(hsotg);
- 	/* Ensure hcd is disconnected */
- 	dwc2_hcd_disconnect(hsotg, true);
- 	dwc2_hcd_stop(hsotg);
-@@ -4443,7 +4460,9 @@ static void _dwc2_hcd_stop(struct usb_hcd *hcd)
- 	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
- 	spin_unlock_irqrestore(&hsotg->lock, flags);
- 
--	dwc2_vbus_supply_exit(hsotg);
-+	/* keep balanced supply init/exit by checking HPRT0_PWR */
-+	if (hprt0 & HPRT0_PWR)
-+		dwc2_vbus_supply_exit(hsotg);
- 
- 	usleep_range(1000, 3000);
- }
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0006-usb-dwc2-Update-registers-definitions-to-support-ser.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0006-usb-dwc2-Update-registers-definitions-to-support-ser.patch
deleted file mode 100644
index e231c5f..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0006-usb-dwc2-Update-registers-definitions-to-support-ser.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From c464da0bff6ab6fd39b4603d017de940832bc388 Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 20:59:07 +0400
-Subject: [PATCH 06/53] usb: dwc2: Update registers definitions to support
- service interval
-
-Added GHWCFG4_SERVICE_INTERVAL_SUPPORTED and
-DCTL_SERVICE_INTERVAL_SUPPORTED bits definitions to support
-service interval based scheduling.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hw.h | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
-index 0ca8e7bc7aaf..524629428439 100644
---- a/drivers/usb/dwc2/hw.h
-+++ b/drivers/usb/dwc2/hw.h
-@@ -312,6 +312,7 @@
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT	14
- #define GHWCFG4_ACG_SUPPORTED			BIT(12)
- #define GHWCFG4_IPG_ISOC_SUPPORTED		BIT(11)
-+#define GHWCFG4_SERVICE_INTERVAL_SUPPORTED      BIT(10)
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8		0
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_16		1
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16	2
-@@ -443,6 +444,7 @@
- #define DCFG_DEVSPD_FS48		3
- 
- #define DCTL				HSOTG_REG(0x804)
-+#define DCTL_SERVICE_INTERVAL_SUPPORTED BIT(19)
- #define DCTL_PWRONPRGDONE		BIT(11)
- #define DCTL_CGOUTNAK			BIT(10)
- #define DCTL_SGOUTNAK			BIT(9)
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0007-usb-dwc2-Add-core-parameter-for-service-interval-sup.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0007-usb-dwc2-Add-core-parameter-for-service-interval-sup.patch
deleted file mode 100644
index 34f645e..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0007-usb-dwc2-Add-core-parameter-for-service-interval-sup.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From ca531bc2bfa655a1a0acaac4f7a6ea4b2111cc43 Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 20:59:34 +0400
-Subject: [PATCH 07/53] usb: dwc2: Add core parameter for service interval
- support
-
-Added core parameter for service interval based scheduling.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h    | 9 +++++++++
- drivers/usb/dwc2/debugfs.c | 1 +
- drivers/usb/dwc2/gadget.c  | 4 ++++
- drivers/usb/dwc2/params.c  | 4 ++++
- 4 files changed, 18 insertions(+)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index cc9c93affa14..2678dc9d559b 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -416,6 +416,9 @@ enum dwc2_ep0_state {
-  *                      back to DWC2_SPEED_PARAM_HIGH while device is gone.
-  *			0 - No (default)
-  *			1 - Yes
-+ * @service_interval:   Enable service interval based scheduling.
-+ *                      0 - No
-+ *                      1 - Yes
-  *
-  * The following parameters may be specified when starting the module. These
-  * parameters define how the DWC_otg controller should be configured. A
-@@ -461,6 +464,7 @@ struct dwc2_core_params {
- 	bool lpm_clock_gating;
- 	bool besl;
- 	bool hird_threshold_en;
-+	bool service_interval;
- 	u8 hird_threshold;
- 	bool activate_stm_fs_transceiver;
- 	bool ipg_isoc_en;
-@@ -605,6 +609,10 @@ struct dwc2_core_params {
-  *			FIFO sizing is enabled 16 to 32768
-  *			Actual maximum value is autodetected and also
-  *			the default.
-+ * @service_interval_mode: For enabling service interval based scheduling in the
-+ *                         controller.
-+ *                           0 - Disable
-+ *                           1 - Enable
-  */
- struct dwc2_hw_params {
- 	unsigned op_mode:3;
-@@ -635,6 +643,7 @@ struct dwc2_hw_params {
- 	unsigned utmi_phy_data_width:2;
- 	unsigned lpm_mode:1;
- 	unsigned ipg_isoc_en:1;
-+	unsigned service_interval_mode:1;
- 	u32 snpsid;
- 	u32 dev_ep_dirs;
- 	u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
-diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
-index 22d015b0424f..7f62f4cdc265 100644
---- a/drivers/usb/dwc2/debugfs.c
-+++ b/drivers/usb/dwc2/debugfs.c
-@@ -701,6 +701,7 @@ static int params_show(struct seq_file *seq, void *v)
- 	print_param(seq, p, besl);
- 	print_param(seq, p, hird_threshold_en);
- 	print_param(seq, p, hird_threshold);
-+	print_param(seq, p, service_interval);
- 	print_param(seq, p, host_dma);
- 	print_param(seq, p, g_dma);
- 	print_param(seq, p, g_dma_desc);
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 79189db4bf17..12032f0488d8 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -3323,6 +3323,10 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
- 		dwc2_set_bit(hsotg, DIEPMSK, DIEPMSK_BNAININTRMSK);
- 	}
- 
-+	/* Enable Service Interval mode if supported */
-+	if (using_desc_dma(hsotg) && hsotg->params.service_interval)
-+		dwc2_set_bit(hsotg, DCTL, DCTL_SERVICE_INTERVAL_SUPPORTED);
-+
- 	dwc2_writel(hsotg, 0, DAINTMSK);
- 
- 	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index bf7052e037d6..dd3c10d537e2 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -299,6 +299,7 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
- 	p->hird_threshold_en = true;
- 	p->hird_threshold = 4;
- 	p->ipg_isoc_en = false;
-+	p->service_interval = false;
- 	p->max_packet_count = hw->max_packet_count;
- 	p->max_transfer_size = hw->max_transfer_size;
- 	p->ahbcfg = GAHBCFG_HBSTLEN_INCR << GAHBCFG_HBSTLEN_SHIFT;
-@@ -592,6 +593,7 @@ static void dwc2_check_params(struct dwc2_hsotg *hsotg)
- 	CHECK_BOOL(besl, (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a));
- 	CHECK_BOOL(hird_threshold_en, hsotg->params.lpm);
- 	CHECK_RANGE(hird_threshold, 0, hsotg->params.besl ? 12 : 7, 0);
-+	CHECK_BOOL(service_interval, hw->service_interval_mode);
- 	CHECK_RANGE(max_packet_count,
- 		    15, hw->max_packet_count,
- 		    hw->max_packet_count);
-@@ -780,6 +782,8 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
- 				  GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT;
- 	hw->acg_enable = !!(hwcfg4 & GHWCFG4_ACG_SUPPORTED);
- 	hw->ipg_isoc_en = !!(hwcfg4 & GHWCFG4_IPG_ISOC_SUPPORTED);
-+	hw->service_interval_mode = !!(hwcfg4 &
-+				       GHWCFG4_SERVICE_INTERVAL_SUPPORTED);
- 
- 	/* fifo sizes */
- 	hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0009-usb-dwc2-Update-target-u-frame-calculation.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0009-usb-dwc2-Update-target-u-frame-calculation.patch
deleted file mode 100644
index 707a2cd..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0009-usb-dwc2-Update-target-u-frame-calculation.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 48dac4e4a5eed3fa478db2c59945b6283281566d Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 21:00:33 +0400
-Subject: [PATCH 09/53] usb: dwc2: Update target (u)frame calculation
-
-In service interval based scheduling target (u)frame must be
-set as a last frame in this the service interval.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 71f097d89001..9de16453a890 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -2830,6 +2830,23 @@ static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep)
- 		if (using_desc_dma(hsotg)) {
- 			hs_ep->target_frame = hsotg->frame_number;
- 			dwc2_gadget_incr_frame_num(hs_ep);
-+
-+			/* In service interval mode target_frame must
-+			 * be set to last (u)frame of the service interval.
-+			 */
-+			if (hsotg->params.service_interval) {
-+				/* Set target_frame to the first (u)frame of
-+				 * the service interval
-+				 */
-+				hs_ep->target_frame &= ~hs_ep->interval + 1;
-+
-+				/* Set target_frame to the last (u)frame of
-+				 * the service interval
-+				 */
-+				dwc2_gadget_incr_frame_num(hs_ep);
-+				dwc2_gadget_dec_frame_num_by_one(hs_ep);
-+			}
-+
- 			dwc2_gadget_start_isoc_ddma(hs_ep);
- 			return;
- 		}
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0010-usb-dwc2-Add-definitions-for-new-registers.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0010-usb-dwc2-Add-definitions-for-new-registers.patch
deleted file mode 100644
index c3de60f..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0010-usb-dwc2-Add-definitions-for-new-registers.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 392af0232640abf7acd12754515f8363c4c0df67 Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 21:01:01 +0400
-Subject: [PATCH 10/53] usb: dwc2: Add definitions for new registers
-
-New registers were added to dwc otg core.
-
-GREFCLK - This register used to control ref_clk parameters.
-
-GINTSTS2 - New WKUP_ALERT interrupt was added.
-
-GINTMSK2 - Mask register for GINTSTS2.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hw.h | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
-index 524629428439..2b1ea441b7d4 100644
---- a/drivers/usb/dwc2/hw.h
-+++ b/drivers/usb/dwc2/hw.h
-@@ -405,6 +405,19 @@
- #define ADPCTL_PRB_DSCHRG_MASK		(0x3 << 0)
- #define ADPCTL_PRB_DSCHRG_SHIFT		0
- 
-+#define GREFCLK				    HSOTG_REG(0x0064)
-+#define GREFCLK_REFCLKPER_MASK		    (0x1ffff << 15)
-+#define GREFCLK_REFCLKPER_SHIFT		    15
-+#define GREFCLK_REF_CLK_MODE		    BIT(14)
-+#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK	    (0x3ff)
-+#define GREFCLK_SOF_CNT_WKUP_ALERT_SHIFT    0
-+
-+#define GINTMSK2			HSOTG_REG(0x0068)
-+#define GINTMSK2_WKUP_ALERT_INT_MSK	BIT(0)
-+
-+#define GINTSTS2			HSOTG_REG(0x006c)
-+#define GINTSTS2_WKUP_ALERT_INT		BIT(0)
-+
- #define HPTXFSIZ			HSOTG_REG(0x100)
- /* Use FIFOSIZE_* constants to access this register */
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0011-usb-dwc2-gadget-Add-parameters-for-GREFCLK-register.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0011-usb-dwc2-gadget-Add-parameters-for-GREFCLK-register.patch
deleted file mode 100644
index c53d618..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0011-usb-dwc2-gadget-Add-parameters-for-GREFCLK-register.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From f3a61e4e033e808e7ac1239b151ec46f833fff4a Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 21:01:31 +0400
-Subject: [PATCH 11/53] usb: dwc2: gadget: Add parameters for GREFCLK register
-
-Added ref_clk_per and sof_cnt_wkup_alert parameters in
-dwc2_core_params struct and set default values.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h   | 18 ++++++++++++++++++
- drivers/usb/dwc2/params.c |  2 ++
- 2 files changed, 20 insertions(+)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 2678dc9d559b..655f5274e801 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -393,6 +393,20 @@ enum dwc2_ep0_state {
-  *			0 - No
-  *			1 - Yes
-  * @hird_threshold:	Value of BESL or HIRD Threshold.
-+ * @ref_clk_per:        Indicates in terms of pico seconds the period
-+ *                      of ref_clk.
-+ *			62500 - 16MHz
-+ *                      58823 - 17MHz
-+ *                      52083 - 19.2MHz
-+ *			50000 - 20MHz
-+ *			41666 - 24MHz
-+ *			33333 - 30MHz (default)
-+ *			25000 - 40MHz
-+ * @sof_cnt_wkup_alert: Indicates in term of number of SOF's after which
-+ *                      the controller should generate an interrupt if the
-+ *                      device had been in L1 state until that period.
-+ *                      This is used by SW to initiate Remote WakeUp in the
-+ *                      controller so as to sync to the uF number from the host.
-  * @activate_stm_fs_transceiver: Activate internal transceiver using GGPIO
-  *			register.
-  *			0 - Deactivate the transceiver (default)
-@@ -472,6 +486,10 @@ struct dwc2_core_params {
- 	u32 max_transfer_size;
- 	u32 ahbcfg;
- 
-+	/* GREFCLK parameters */
-+	u32 ref_clk_per;
-+	u16 sof_cnt_wkup_alert;
-+
- 	/* Host parameters */
- 	bool host_dma;
- 	bool dma_desc_enable;
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index dd3c10d537e2..d150984406ee 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -303,6 +303,8 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
- 	p->max_packet_count = hw->max_packet_count;
- 	p->max_transfer_size = hw->max_transfer_size;
- 	p->ahbcfg = GAHBCFG_HBSTLEN_INCR << GAHBCFG_HBSTLEN_SHIFT;
-+	p->ref_clk_per = 33333;
-+	p->sof_cnt_wkup_alert = 100;
- 
- 	if ((hsotg->dr_mode == USB_DR_MODE_HOST) ||
- 	    (hsotg->dr_mode == USB_DR_MODE_OTG)) {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0012-usb-dwc2-gadget-Program-GREFCLK-register.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0012-usb-dwc2-gadget-Program-GREFCLK-register.patch
deleted file mode 100644
index 7dbbb81..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0012-usb-dwc2-gadget-Program-GREFCLK-register.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 15d9dbf8cbd4fc777a7fc92209903dbb47d0783e Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 21:01:59 +0400
-Subject: [PATCH 12/53] usb: dwc2: gadget: Program GREFCLK register
-
-Added dwc2_gadget_program_ref_clk function to program GREFCLK
-register in device mode.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h   |  2 ++
- drivers/usb/dwc2/gadget.c | 23 +++++++++++++++++++++++
- 2 files changed, 25 insertions(+)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 655f5274e801..30bab8463c96 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -1381,6 +1381,7 @@ int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg);
- int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg);
- int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg);
- void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg);
-+void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg);
- #else
- static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
- { return 0; }
-@@ -1415,6 +1416,7 @@ static inline int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
- static inline int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
- { return 0; }
- static inline void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg) {}
-+static inline void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg) {}
- #endif
- 
- #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 9de16453a890..e8dd6897e2c3 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -3418,6 +3418,10 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
- 	/* configure the core to support LPM */
- 	dwc2_gadget_init_lpm(hsotg);
- 
-+	/* program GREFCLK register if needed */
-+	if (using_desc_dma(hsotg) && hsotg->params.service_interval)
-+		dwc2_gadget_program_ref_clk(hsotg);
-+
- 	/* must be at-least 3ms to allow bus to see disconnect */
- 	mdelay(3);
- 
-@@ -5002,6 +5006,25 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg)
- }
- 
- /**
-+ * dwc2_gadget_program_ref_clk - Program GREFCLK register in device mode
-+ *
-+ * @hsotg: Programming view of DWC_otg controller
-+ *
-+ */
-+void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg)
-+{
-+	u32 val = 0;
-+
-+	val |= GREFCLK_REF_CLK_MODE;
-+	val |= hsotg->params.ref_clk_per << GREFCLK_REFCLKPER_SHIFT;
-+	val |= hsotg->params.sof_cnt_wkup_alert <<
-+	       GREFCLK_SOF_CNT_WKUP_ALERT_SHIFT;
-+
-+	dwc2_writel(hsotg, val, GREFCLK);
-+	dev_dbg(hsotg->dev, "GREFCLK=0x%08x\n", dwc2_readl(hsotg, GREFCLK));
-+}
-+
-+/**
-  * dwc2_gadget_enter_hibernation() - Put controller in Hibernation.
-  *
-  * @hsotg: Programming view of the DWC_otg controller
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0013-usb-dwc2-gadget-enable-WKUP_ALERT-interrupt.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0013-usb-dwc2-gadget-enable-WKUP_ALERT-interrupt.patch
deleted file mode 100644
index c17318e..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0013-usb-dwc2-gadget-enable-WKUP_ALERT-interrupt.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4abe453750db8ada8b0a56c45c89ab18920e9a80 Mon Sep 17 00:00:00 2001
-From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
-Date: Wed, 29 Aug 2018 21:02:28 +0400
-Subject: [PATCH 13/53] usb: dwc2: gadget: enable WKUP_ALERT interrupt
-
-WKUP_ALERT interrupt should be unmask when lpm mode is enabled.
-
-This interrupt is asserted when the device is in L1 for the duration
-mentioned in GREFCLK.SOF_CNN_WKUP_ALERT. This is used to alert SW to
-initiate Remote wake up so that the device resumes in time in order not
-to lose sync with the host frame number.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index e8dd6897e2c3..24bd9fdabc67 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -5003,6 +5003,10 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg)
- 	val |= hsotg->params.besl ? GLPMCFG_ENBESL : 0;
- 	dwc2_writel(hsotg, val, GLPMCFG);
- 	dev_dbg(hsotg->dev, "GLPMCFG=0x%08x\n", dwc2_readl(hsotg, GLPMCFG));
-+
-+	/* Unmask WKUP_ALERT Interrupt */
-+	if (hsotg->params.service_interval)
-+		dwc2_set_bit(hsotg, GINTMSK2, GINTMSK2_WKUP_ALERT_INT_MSK);
- }
- 
- /**
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0017-usb-dwc2-gadget-Fix-WkupAlert-interrupt-handler.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0017-usb-dwc2-gadget-Fix-WkupAlert-interrupt-handler.patch
deleted file mode 100644
index d02306d..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0017-usb-dwc2-gadget-Fix-WkupAlert-interrupt-handler.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d64bc8ee92856e39b3150d93e244ca8239ae6ada Mon Sep 17 00:00:00 2001
-From: Artur Petrosyan <arthur.petrosyan@synopsys.com>
-Date: Fri, 2 Nov 2018 11:29:48 -0400
-Subject: [PATCH 17/53] usb: dwc2: gadget: Fix WkupAlert interrupt handler.
-
-According to the databook DCTL_RMTWKUPSIG bit
-is defined in DCTL register not in DCFG.
-
-Updated setting DCTL_RMTWKUPSIG bit to DCTL
-register.
-
-Fixes: 187c5298a122 ("usb: dwc2: gadget: Add handler for WkupAlert interrupt")
-
-Signed-off-by: Artur Petrosyan <arturp@synopsys.com>
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 2d6d2c8244de..6bd4054e894d 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -262,7 +262,7 @@ static void dwc2_gadget_wkup_alert_handler(struct dwc2_hsotg *hsotg)
- 	if (gintsts2 & GINTSTS2_WKUP_ALERT_INT) {
- 		dev_dbg(hsotg->dev, "%s: Wkup_Alert_Int\n", __func__);
- 		dwc2_clear_bit(hsotg, GINTSTS2, GINTSTS2_WKUP_ALERT_INT);
--		dwc2_set_bit(hsotg, DCFG, DCTL_RMTWKUPSIG);
-+		dwc2_set_bit(hsotg, DCTL, DCTL_RMTWKUPSIG);
- 	}
- }
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0018-usb-dwc2-gadget-Accept-LPM-token-when-TxFIFO-is-not-.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0018-usb-dwc2-gadget-Accept-LPM-token-when-TxFIFO-is-not-.patch
deleted file mode 100644
index 4b28345..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0018-usb-dwc2-gadget-Accept-LPM-token-when-TxFIFO-is-not-.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 9aed8c08c82d8498769119b73358d070a7cbb54c Mon Sep 17 00:00:00 2001
-From: Artur Petrosyan <arthur.petrosyan@synopsys.com>
-Date: Fri, 2 Nov 2018 11:29:55 -0400
-Subject: [PATCH 18/53] usb: dwc2: gadget: Accept LPM token when TxFIFO is not
- empty
-
-Set GLPMCFG_LPM_ACCEPT_CTRL_ISOC bit in GLPMCFG register
-to accept LPM token during ISOC transfers when TxFIFO is
-not empty.
-
-- Added two definitions.
-  	#define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL        BIT(21)
-  	#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC   BIT(22)
-  This patch uses GLPMCFG_LPM_ACCEPT_CTRL_ISOC.
-  GLPMCFG_LPM_ACCEPT_CTRL_CONTROL is defined for further use.
-
-- Added setting GLPMCFG_LPM_ACCEPT_CTRL_ISOC bit in GLPMCFG
-  register in dwc2_gadget_init_lpm function.
-
-Signed-off-by: Artur Petrosyan <arturp@synopsys.com>
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 1 +
- drivers/usb/dwc2/hw.h     | 2 ++
- 2 files changed, 3 insertions(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 6bd4054e894d..94f3ba995580 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -5026,6 +5026,7 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg)
- 	val |= hsotg->params.lpm_clock_gating ? GLPMCFG_ENBLSLPM : 0;
- 	val |= hsotg->params.hird_threshold << GLPMCFG_HIRD_THRES_SHIFT;
- 	val |= hsotg->params.besl ? GLPMCFG_ENBESL : 0;
-+	val |= GLPMCFG_LPM_ACCEPT_CTRL_ISOC;
- 	dwc2_writel(hsotg, val, GLPMCFG);
- 	dev_dbg(hsotg->dev, "GLPMCFG=0x%08x\n", dwc2_readl(hsotg, GLPMCFG));
- 
-diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
-index 2b1ea441b7d4..98af924a9a5c 100644
---- a/drivers/usb/dwc2/hw.h
-+++ b/drivers/usb/dwc2/hw.h
-@@ -333,6 +333,8 @@
- #define GLPMCFG_SNDLPM			BIT(24)
- #define GLPMCFG_RETRY_CNT_MASK		(0x7 << 21)
- #define GLPMCFG_RETRY_CNT_SHIFT		21
-+#define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL	BIT(21)
-+#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC	BIT(22)
- #define GLPMCFG_LPM_CHNL_INDX_MASK	(0xf << 17)
- #define GLPMCFG_LPM_CHNL_INDX_SHIFT	17
- #define GLPMCFG_L1RESUMEOK		BIT(16)
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0023-usb-dwc2-gadget-Fix-Remote-Wakeup-interrupt-bit-clea.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0023-usb-dwc2-gadget-Fix-Remote-Wakeup-interrupt-bit-clea.patch
deleted file mode 100644
index b1f6090..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0023-usb-dwc2-gadget-Fix-Remote-Wakeup-interrupt-bit-clea.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 87b6d2c56825c3119a0e64cc208ae6d795810a2e Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Wed, 12 Dec 2018 16:44:32 +0400
-Subject: [PATCH 23/53] usb: dwc2: gadget: Fix Remote Wakeup interrupt bit
- clearing
-
-To clear GINTSTS2_WKUP_ALERT_INT bit in GINTSTS2 register
-require to write 1. This bit is implemented as "Write to clear".
-
-Fixes: 187c5298a122 ("usb: dwc2: gadget: Add handler for WkupAlert interrupt")
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 68ad75a7460d..55ef3cc2701b 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -261,7 +261,7 @@ static void dwc2_gadget_wkup_alert_handler(struct dwc2_hsotg *hsotg)
- 
- 	if (gintsts2 & GINTSTS2_WKUP_ALERT_INT) {
- 		dev_dbg(hsotg->dev, "%s: Wkup_Alert_Int\n", __func__);
--		dwc2_clear_bit(hsotg, GINTSTS2, GINTSTS2_WKUP_ALERT_INT);
-+		dwc2_set_bit(hsotg, GINTSTS2, GINTSTS2_WKUP_ALERT_INT);
- 		dwc2_set_bit(hsotg, DCTL, DCTL_RMTWKUPSIG);
- 	}
- }
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0024-USB-add-missing-SPDX-lines-to-Kconfig-and-Makefiles.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0024-USB-add-missing-SPDX-lines-to-Kconfig-and-Makefiles.patch
deleted file mode 100644
index c146380..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0024-USB-add-missing-SPDX-lines-to-Kconfig-and-Makefiles.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From cae8dc3b685fb24f61f09b7197c6a383a66cff2c Mon Sep 17 00:00:00 2001
-From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Date: Thu, 17 Jan 2019 09:23:50 +0100
-Subject: [PATCH 24/53] USB: add missing SPDX lines to Kconfig and Makefiles
-
-There are a few remaining drivers/usb/ files that do not have SPDX
-identifiers in them, all of these are either Kconfig or Makefiles.  Add
-the correct GPL-2.0 identifier to them to make scanning tools happy.
-
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/usb/dwc2/Kconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/usb/dwc2/Kconfig b/drivers/usb/dwc2/Kconfig
-index b6a495e98fd8..68d095ae2865 100644
---- a/drivers/usb/dwc2/Kconfig
-+++ b/drivers/usb/dwc2/Kconfig
-@@ -1,3 +1,5 @@
-+# SPDX-License-Identifier: GPL-2.0
-+
- config USB_DWC2
- 	tristate "DesignWare USB2 DRD Core Support"
- 	depends on HAS_DMA
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0025-usb-dwc2-Fix-EP-TxFIFO-number-setting.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0025-usb-dwc2-Fix-EP-TxFIFO-number-setting.patch
deleted file mode 100644
index c60f385..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0025-usb-dwc2-Fix-EP-TxFIFO-number-setting.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 97311c8f8b6e26d5ba6508f0df430ad80fc59327 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Thu, 31 Jan 2019 18:28:07 +0400
-Subject: [PATCH 25/53] usb: dwc2: Fix EP TxFIFO number setting
-
-In case when some EP IN is frequently reused, i.e. enabled/disabled by
-function driver. It is required to clear TxFIFO number field in DIEPCTL
-register before setting new number. Otherwise there is probability to
-have same TxFIFO number for different EP's because of OR operator.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 55ef3cc2701b..e15d8a462085 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -4005,6 +4005,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
- 			ret = -ENOMEM;
- 			goto error1;
- 		}
-+		epctrl &= ~(DXEPCTL_TXFNUM_LIMIT << DXEPCTL_TXFNUM_SHIFT);
- 		hsotg->fifo_map |= 1 << fifo_index;
- 		epctrl |= DXEPCTL_TXFNUM(fifo_index);
- 		hs_ep->fifo_index = fifo_index;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0026-usb-dwc2-gadget-Add-scatter-gather-mode.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0026-usb-dwc2-gadget-Add-scatter-gather-mode.patch
deleted file mode 100644
index ab76ce2..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0026-usb-dwc2-gadget-Add-scatter-gather-mode.patch
+++ /dev/null
@@ -1,212 +0,0 @@
-From 10209abe87f5ebfd482a00323f5236d6094d0865 Mon Sep 17 00:00:00 2001
-From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
-Date: Mon, 21 Jan 2019 14:44:47 +0100
-Subject: [PATCH 26/53] usb: dwc2: gadget: Add scatter-gather mode
-
-This patch adds support for transferring requests, which are
-non-contiguous in physical memory, i.e. the data buffer is described by
-a scatter-list. This allows transferring large requests without relying
-on error-prone contiguous buffer allocations. This way of allocating
-requests is already implemented in functionfs and TCM USB functions and
-automatically used if UDC driver advertises scatter-gather suppport.
-
-Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
-[mszyprow: fixed null pointer issue, rewrote commit message]
-Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 113 +++++++++++++++++++++++++++++++---------------
- 1 file changed, 77 insertions(+), 36 deletions(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index e15d8a462085..6812a8a3a98b 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -768,22 +768,13 @@ static u32 dwc2_gadget_get_desc_params(struct dwc2_hsotg_ep *hs_ep, u32 *mask)
- 	return desc_size;
- }
- 
--/*
-- * dwc2_gadget_config_nonisoc_xfer_ddma - prepare non ISOC DMA desc chain.
-- * @hs_ep: The endpoint
-- * @dma_buff: DMA address to use
-- * @len: Length of the transfer
-- *
-- * This function will iterate over descriptor chain and fill its entries
-- * with corresponding information based on transfer data.
-- */
--static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
-+static void dwc2_gadget_fill_nonisoc_xfer_ddma_one(struct dwc2_hsotg_ep *hs_ep,
-+						 struct dwc2_dma_desc **desc,
- 						 dma_addr_t dma_buff,
--						 unsigned int len)
-+						 unsigned int len,
-+						 bool true_last)
- {
--	struct dwc2_hsotg *hsotg = hs_ep->parent;
- 	int dir_in = hs_ep->dir_in;
--	struct dwc2_dma_desc *desc = hs_ep->desc_list;
- 	u32 mps = hs_ep->ep.maxpacket;
- 	u32 maxsize = 0;
- 	u32 offset = 0;
-@@ -798,39 +789,77 @@ static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
- 		hs_ep->desc_count = 1;
- 
- 	for (i = 0; i < hs_ep->desc_count; ++i) {
--		desc->status = 0;
--		desc->status |= (DEV_DMA_BUFF_STS_HBUSY
-+		(*desc)->status = 0;
-+		(*desc)->status |= (DEV_DMA_BUFF_STS_HBUSY
- 				 << DEV_DMA_BUFF_STS_SHIFT);
- 
- 		if (len > maxsize) {
- 			if (!hs_ep->index && !dir_in)
--				desc->status |= (DEV_DMA_L | DEV_DMA_IOC);
-+				(*desc)->status |= (DEV_DMA_L | DEV_DMA_IOC);
- 
--			desc->status |= (maxsize <<
--						DEV_DMA_NBYTES_SHIFT & mask);
--			desc->buf = dma_buff + offset;
-+			(*desc)->status |=
-+				maxsize << DEV_DMA_NBYTES_SHIFT & mask;
-+			(*desc)->buf = dma_buff + offset;
- 
- 			len -= maxsize;
- 			offset += maxsize;
- 		} else {
--			desc->status |= (DEV_DMA_L | DEV_DMA_IOC);
-+			if (true_last)
-+				(*desc)->status |= (DEV_DMA_L | DEV_DMA_IOC);
- 
- 			if (dir_in)
--				desc->status |= (len % mps) ? DEV_DMA_SHORT :
--					((hs_ep->send_zlp) ? DEV_DMA_SHORT : 0);
--			if (len > maxsize)
--				dev_err(hsotg->dev, "wrong len %d\n", len);
-+				(*desc)->status |= (len % mps) ? DEV_DMA_SHORT :
-+					((hs_ep->send_zlp && true_last) ?
-+					DEV_DMA_SHORT : 0);
- 
--			desc->status |=
-+			(*desc)->status |=
- 				len << DEV_DMA_NBYTES_SHIFT & mask;
--			desc->buf = dma_buff + offset;
-+			(*desc)->buf = dma_buff + offset;
- 		}
- 
--		desc->status &= ~DEV_DMA_BUFF_STS_MASK;
--		desc->status |= (DEV_DMA_BUFF_STS_HREADY
-+		(*desc)->status &= ~DEV_DMA_BUFF_STS_MASK;
-+		(*desc)->status |= (DEV_DMA_BUFF_STS_HREADY
- 				 << DEV_DMA_BUFF_STS_SHIFT);
--		desc++;
-+		(*desc)++;
-+	}
-+}
-+
-+/*
-+ * dwc2_gadget_config_nonisoc_xfer_ddma - prepare non ISOC DMA desc chain.
-+ * @hs_ep: The endpoint
-+ * @ureq: Request to transfer
-+ * @offset: offset in bytes
-+ * @len: Length of the transfer
-+ *
-+ * This function will iterate over descriptor chain and fill its entries
-+ * with corresponding information based on transfer data.
-+ */
-+static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
-+						 struct usb_request *ureq,
-+						 unsigned int offset,
-+						 unsigned int len)
-+{
-+	struct dwc2_dma_desc *desc = hs_ep->desc_list;
-+	struct scatterlist *sg;
-+	int i;
-+	u8 desc_count = 0;
-+
-+	/* non-DMA sg buffer */
-+	if (!ureq->num_sgs) {
-+		dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc,
-+			ureq->dma + offset, len, true);
-+		return;
- 	}
-+
-+	/* DMA sg buffer */
-+	for_each_sg(ureq->sg, sg, ureq->num_sgs, i) {
-+		dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc,
-+			sg_dma_address(sg) + sg->offset, sg_dma_len(sg),
-+			sg_is_last(sg));
-+		desc_count += hs_ep->desc_count;
-+	}
-+
-+	hs_ep->desc_count = desc_count;
- }
- 
- /*
-@@ -944,7 +973,13 @@ static void dwc2_gadget_start_isoc_ddma(struct dwc2_hsotg_ep *hs_ep)
- 
- 	hs_ep->next_desc = 0;
- 	list_for_each_entry_safe(hs_req, treq, &hs_ep->queue, queue) {
--		ret = dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma,
-+		dma_addr_t dma_addr = hs_req->req.dma;
-+
-+		if (hs_req->req.num_sgs) {
-+			WARN_ON(hs_req->req.num_sgs > 1);
-+			dma_addr = sg_dma_address(hs_req->req.sg);
-+		}
-+		ret = dwc2_gadget_fill_isoc_desc(hs_ep, dma_addr,
- 						 hs_req->req.length);
- 		if (ret)
- 			break;
-@@ -1100,7 +1135,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
- 			offset = ureq->actual;
- 
- 		/* Fill DDMA chain entries */
--		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq->dma + offset,
-+		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq, offset,
- 						     length);
- 
- 		/* write descriptor chain address to control register */
-@@ -1399,7 +1434,13 @@ static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
- 	 */
- 	if (using_desc_dma(hs) && hs_ep->isochronous) {
- 		if (hs_ep->target_frame != TARGET_FRAME_INITIAL) {
--			dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma,
-+			dma_addr_t dma_addr = hs_req->req.dma;
-+
-+			if (hs_req->req.num_sgs) {
-+				WARN_ON(hs_req->req.num_sgs > 1);
-+				dma_addr = sg_dma_address(hs_req->req.sg);
-+			}
-+			dwc2_gadget_fill_isoc_desc(hs_ep, dma_addr,
- 						   hs_req->req.length);
- 		}
- 		return 0;
-@@ -1987,13 +2028,12 @@ static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
- 		dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n",
- 			index);
- 	if (using_desc_dma(hsotg)) {
--		/* Not specific buffer needed for ep0 ZLP */
--		dma_addr_t dma = hs_ep->desc_list_dma;
--
- 		if (!index)
- 			dwc2_gadget_set_ep0_desc_chain(hsotg, hs_ep);
- 
--		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, dma, 0);
-+		/* Not specific buffer needed for ep0 ZLP */
-+		dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &hs_ep->desc_list,
-+			hs_ep->desc_list_dma, 0, true);
- 	} else {
- 		dwc2_writel(hsotg, DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) |
- 			    DXEPTSIZ_XFERSIZE(0),
-@@ -4386,6 +4426,7 @@ static int dwc2_hsotg_udc_start(struct usb_gadget *gadget,
- 	hsotg->enabled = 0;
- 	spin_unlock_irqrestore(&hsotg->lock, flags);
- 
-+	gadget->sg_supported = using_desc_dma(hsotg);
- 	dev_info(hsotg->dev, "bound driver %s\n", driver->driver.name);
- 
- 	return 0;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0027-usb-dwc2-use-struct_size-in-kzalloc.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0027-usb-dwc2-use-struct_size-in-kzalloc.patch
deleted file mode 100644
index 0f27d37..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0027-usb-dwc2-use-struct_size-in-kzalloc.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From eeca7606dd6e2445f505903f235e908eb7b78dfc Mon Sep 17 00:00:00 2001
-From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
-Date: Mon, 18 Feb 2019 12:59:37 -0600
-Subject: [PATCH 27/53] usb: dwc2: use struct_size() in kzalloc()
-
-One of the more common cases of allocation size calculations is finding
-the size of a structure that has a zero-sized array at the end, along
-with memory for some number of elements for that array. For example:
-
-struct foo {
-    int stuff;
-    struct boo entry[];
-};
-
-size = sizeof(struct foo) + count * sizeof(struct boo);
-instance = kzalloc(size, GFP_KERNEL);
-
-Instead of leaving these open-coded and prone to type mistakes, we can
-now use the new struct_size() helper:
-
-instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL);
-
-Notice that, in this case, variable size is not necessary, hence
-it is removed.
-
-This code was detected with the help of Coccinelle.
-
-Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/usb/dwc2/hcd.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index dd82fa516f3f..3f087962f498 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -3981,10 +3981,8 @@ static struct dwc2_hcd_urb *dwc2_hcd_urb_alloc(struct dwc2_hsotg *hsotg,
- 					       gfp_t mem_flags)
- {
- 	struct dwc2_hcd_urb *urb;
--	u32 size = sizeof(*urb) + iso_desc_count *
--		   sizeof(struct dwc2_hcd_iso_packet_desc);
- 
--	urb = kzalloc(size, mem_flags);
-+	urb = kzalloc(struct_size(urb, iso_descs, iso_desc_count), mem_flags);
- 	if (urb)
- 		urb->packet_count = iso_desc_count;
- 	return urb;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0028-usb-dwc2-Add-Amlogic-G12A-DWC2-Params.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0028-usb-dwc2-Add-Amlogic-G12A-DWC2-Params.patch
deleted file mode 100644
index bc8753d..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0028-usb-dwc2-Add-Amlogic-G12A-DWC2-Params.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From fc4e326ee72cc36c942333c65d851247b31c567b Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Tue, 23 Apr 2019 10:51:26 +0200
-Subject: [PATCH 28/53] usb: dwc2: Add Amlogic G12A DWC2 Params
-
-This patchs sets the params for the DWC2 Controller found in the
-Amlogic G12A SoC family.
-
-It mainly sets the settings reported incorrect by the driver,
-leaving the remaining detected automatically by the driver and
-provided by the DT node.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/params.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index 24ff5f21cb25..442113246cba 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -121,6 +121,16 @@ static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
- 	p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
- }
- 
-+static void dwc2_set_amlogic_g12a_params(struct dwc2_hsotg *hsotg)
-+{
-+	struct dwc2_core_params *p = &hsotg->params;
-+
-+	p->lpm = false;
-+	p->lpm_clock_gating = false;
-+	p->besl = false;
-+	p->hird_threshold_en = false;
-+}
-+
- static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
- {
- 	struct dwc2_core_params *p = &hsotg->params;
-@@ -167,6 +177,8 @@ const struct of_device_id dwc2_of_match_table[] = {
- 	  .data = dwc2_set_amlogic_params },
- 	{ .compatible = "amlogic,meson-gxbb-usb",
- 	  .data = dwc2_set_amlogic_params },
-+	{ .compatible = "amlogic,meson-g12a-usb",
-+	  .data = dwc2_set_amlogic_g12a_params },
- 	{ .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
- 	{ .compatible = "st,stm32f4x9-fsotg",
- 	  .data = dwc2_set_stm32f4x9_fsotg_params },
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0029-usb-dwc2-bus-suspend-resume-for-hosts-with-DWC2_POWE.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0029-usb-dwc2-bus-suspend-resume-for-hosts-with-DWC2_POWE.patch
deleted file mode 100644
index 3e0163e..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0029-usb-dwc2-bus-suspend-resume-for-hosts-with-DWC2_POWE.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From 6f6d70597c15b2a406afa541517e6ad35f56a8a3 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Wed, 17 Apr 2019 17:13:52 -0700
-Subject: [PATCH 29/53] usb: dwc2: bus suspend/resume for hosts with
- DWC2_POWER_DOWN_PARAM_NONE
-
-This is an attempt to rehash commit 0cf884e819e0 ("usb: dwc2: add bus
-suspend/resume for dwc2") on ToT.  That commit was reverted in commit
-b0bb9bb6ce01 ("Revert "usb: dwc2: add bus suspend/resume for dwc2"")
-because apparently it broke the Altera SOCFPGA.
-
-With all the changes that have happened to dwc2 in the meantime, it's
-possible that the Altera SOCFPGA will just magically work with this
-change now.  ...and it would be good to get bus suspend/resume
-implemented.
-
-This change is a forward port of one that's been living in the Chrome
-OS 3.14 kernel tree.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hcd.c | 84 +++++++++++++++++++++++++++++++-------------------
- 1 file changed, 53 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 3f087962f498..8667ddf3ca74 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -4471,6 +4471,7 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
- 	unsigned long flags;
- 	int ret = 0;
- 	u32 hprt0;
-+	u32 pcgctl;
- 
- 	spin_lock_irqsave(&hsotg->lock, flags);
- 
-@@ -4486,7 +4487,7 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
- 	if (hsotg->op_state == OTG_STATE_B_PERIPHERAL)
- 		goto unlock;
- 
--	if (hsotg->params.power_down != DWC2_POWER_DOWN_PARAM_PARTIAL)
-+	if (hsotg->params.power_down > DWC2_POWER_DOWN_PARAM_PARTIAL)
- 		goto skip_power_saving;
- 
- 	/*
-@@ -4495,21 +4496,35 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
- 	 */
- 	if (!hsotg->bus_suspended) {
- 		hprt0 = dwc2_read_hprt0(hsotg);
--		hprt0 |= HPRT0_SUSP;
--		hprt0 &= ~HPRT0_PWR;
--		dwc2_writel(hsotg, hprt0, HPRT0);
--		spin_unlock_irqrestore(&hsotg->lock, flags);
--		dwc2_vbus_supply_exit(hsotg);
--		spin_lock_irqsave(&hsotg->lock, flags);
-+		if (hprt0 & HPRT0_CONNSTS) {
-+			hprt0 |= HPRT0_SUSP;
-+			if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_PARTIAL)
-+				hprt0 &= ~HPRT0_PWR;
-+			dwc2_writel(hsotg, hprt0, HPRT0);
-+		}
-+		if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_PARTIAL) {
-+			spin_unlock_irqrestore(&hsotg->lock, flags);
-+			dwc2_vbus_supply_exit(hsotg);
-+			spin_lock_irqsave(&hsotg->lock, flags);
-+		} else {
-+			pcgctl = readl(hsotg->regs + PCGCTL);
-+			pcgctl |= PCGCTL_STOPPCLK;
-+			writel(pcgctl, hsotg->regs + PCGCTL);
-+		}
- 	}
- 
--	/* Enter partial_power_down */
--	ret = dwc2_enter_partial_power_down(hsotg);
--	if (ret) {
--		if (ret != -ENOTSUPP)
--			dev_err(hsotg->dev,
--				"enter partial_power_down failed\n");
--		goto skip_power_saving;
-+	if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_PARTIAL) {
-+		/* Enter partial_power_down */
-+		ret = dwc2_enter_partial_power_down(hsotg);
-+		if (ret) {
-+			if (ret != -ENOTSUPP)
-+				dev_err(hsotg->dev,
-+					"enter partial_power_down failed\n");
-+			goto skip_power_saving;
-+		}
-+
-+		/* After entering partial_power_down, hardware is no more accessible */
-+		clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
- 	}
- 
- 	/* Ask phy to be suspended */
-@@ -4519,9 +4534,6 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
- 		spin_lock_irqsave(&hsotg->lock, flags);
- 	}
- 
--	/* After entering partial_power_down, hardware is no more accessible */
--	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
--
- skip_power_saving:
- 	hsotg->lx_state = DWC2_L2;
- unlock:
-@@ -4534,6 +4546,7 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
- {
- 	struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
- 	unsigned long flags;
-+	u32 pcgctl;
- 	int ret = 0;
- 
- 	spin_lock_irqsave(&hsotg->lock, flags);
-@@ -4544,18 +4557,12 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
- 	if (hsotg->lx_state != DWC2_L2)
- 		goto unlock;
- 
--	if (hsotg->params.power_down != DWC2_POWER_DOWN_PARAM_PARTIAL) {
-+	if (hsotg->params.power_down > DWC2_POWER_DOWN_PARAM_PARTIAL) {
- 		hsotg->lx_state = DWC2_L0;
- 		goto unlock;
- 	}
- 
- 	/*
--	 * Set HW accessible bit before powering on the controller
--	 * since an interrupt may rise.
--	 */
--	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
--
--	/*
- 	 * Enable power if not already done.
- 	 * This must not be spinlocked since duration
- 	 * of this call is unknown.
-@@ -4566,10 +4573,23 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
- 		spin_lock_irqsave(&hsotg->lock, flags);
- 	}
- 
--	/* Exit partial_power_down */
--	ret = dwc2_exit_partial_power_down(hsotg, true);
--	if (ret && (ret != -ENOTSUPP))
--		dev_err(hsotg->dev, "exit partial_power_down failed\n");
-+	if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_PARTIAL) {
-+		/*
-+		 * Set HW accessible bit before powering on the controller
-+		 * since an interrupt may rise.
-+		 */
-+		set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
-+
-+
-+		/* Exit partial_power_down */
-+		ret = dwc2_exit_partial_power_down(hsotg, true);
-+		if (ret && (ret != -ENOTSUPP))
-+			dev_err(hsotg->dev, "exit partial_power_down failed\n");
-+	} else {
-+		pcgctl = readl(hsotg->regs + PCGCTL);
-+		pcgctl &= ~PCGCTL_STOPPCLK;
-+		writel(pcgctl, hsotg->regs + PCGCTL);
-+	}
- 
- 	hsotg->lx_state = DWC2_L0;
- 
-@@ -4581,10 +4601,12 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
- 		spin_unlock_irqrestore(&hsotg->lock, flags);
- 		dwc2_port_resume(hsotg);
- 	} else {
--		dwc2_vbus_supply_init(hsotg);
-+		if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_PARTIAL) {
-+			dwc2_vbus_supply_init(hsotg);
- 
--		/* Wait for controller to correctly update D+/D- level */
--		usleep_range(3000, 5000);
-+			/* Wait for controller to correctly update D+/D- level */
-+			usleep_range(3000, 5000);
-+		}
- 
- 		/*
- 		 * Clear Port Enable and Port Status changes.
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0030-usb-dwc2-gadget-Reject-LPM-token-during-Control-tran.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0030-usb-dwc2-gadget-Reject-LPM-token-during-Control-tran.patch
deleted file mode 100644
index 08b0b8b..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0030-usb-dwc2-gadget-Reject-LPM-token-during-Control-tran.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 466375657d6c5987f2f2404c75b7081ede14cff4 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
-Date: Thu, 18 Apr 2019 15:40:43 +0400
-Subject: [PATCH 30/53] usb: dwc2: gadget: Reject LPM token during Control
- transfers
-
-Avoiding switch to L1 state in any stage of control transfers.
-Send NYET handshake to LPM token.
-
-Renamed GLPMCFG_LPM_ACCEPT_CTRL_ISOC to GLPMCFG_LPM_REJECT_CTRL_CONTROL
-because by setting this bit core reject LPM token.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 1 +
- drivers/usb/dwc2/hw.h     | 2 +-
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 6812a8a3a98b..6ac850d6ad44 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -5073,6 +5073,7 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg)
- 	val |= hsotg->params.lpm_clock_gating ? GLPMCFG_ENBLSLPM : 0;
- 	val |= hsotg->params.hird_threshold << GLPMCFG_HIRD_THRES_SHIFT;
- 	val |= hsotg->params.besl ? GLPMCFG_ENBESL : 0;
-+	val |= GLPMCFG_LPM_REJECT_CTRL_CONTROL;
- 	val |= GLPMCFG_LPM_ACCEPT_CTRL_ISOC;
- 	dwc2_writel(hsotg, val, GLPMCFG);
- 	dev_dbg(hsotg->dev, "GLPMCFG=0x%08x\n", dwc2_readl(hsotg, GLPMCFG));
-diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
-index 98af924a9a5c..1bc394dcfa9d 100644
---- a/drivers/usb/dwc2/hw.h
-+++ b/drivers/usb/dwc2/hw.h
-@@ -333,7 +333,7 @@
- #define GLPMCFG_SNDLPM			BIT(24)
- #define GLPMCFG_RETRY_CNT_MASK		(0x7 << 21)
- #define GLPMCFG_RETRY_CNT_SHIFT		21
--#define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL	BIT(21)
-+#define GLPMCFG_LPM_REJECT_CTRL_CONTROL	BIT(21)
- #define GLPMCFG_LPM_ACCEPT_CTRL_ISOC	BIT(22)
- #define GLPMCFG_LPM_CHNL_INDX_MASK	(0xf << 17)
- #define GLPMCFG_LPM_CHNL_INDX_SHIFT	17
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0032-usb-dwc2-optionally-assert-phy-reset-when-waking-up.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0032-usb-dwc2-optionally-assert-phy-reset-when-waking-up.patch
deleted file mode 100644
index 474513e..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0032-usb-dwc2-optionally-assert-phy-reset-when-waking-up.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From c40cf7705e13d288d900e044c0a2f756e9e4909a Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Tue, 16 Apr 2019 14:53:49 -0700
-Subject: [PATCH 32/53] usb: dwc2: optionally assert phy reset when waking up
-
-On the rk3288 USB host-only port (the one that's not the OTG-enabled
-port) the PHY can get into a bad state when a wakeup is asserted (not
-just a wakeup from full system suspend but also a wakeup from
-autosuspend).
-
-We can get the PHY out of its bad state by asserting its "port reset",
-but unfortunately that seems to assert a reset onto the USB bus so it
-could confuse things if we don't actually deenumerate / reenumerate the
-device.
-
-We can also get the PHY out of its bad state by fully resetting it using
-the reset from the CRU (clock reset unit), which does a more full
-reset.  The CRU-based reset appears to actually cause devices on the bus
-to be removed and reinserted, which fixes the problem (albeit in a hacky
-way).
-
-It's unfortunate that we need to do a full re-enumeration of devices at
-wakeup time, but this is better than alternative of letting the bus get
-wedged.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h      |  8 ++++++++
- drivers/usb/dwc2/core_intr.c | 12 ++++++++++++
- drivers/usb/dwc2/hcd.c       | 18 +++++++++++++++---
- drivers/usb/dwc2/platform.c  |  9 +++++++++
- 4 files changed, 44 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 30bab8463c96..764c78ebee28 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -859,6 +859,8 @@ struct dwc2_hregs_backup {
-  * @gadget_enabled:	Peripheral mode sub-driver initialization indicator.
-  * @ll_hw_enabled:	Status of low-level hardware resources.
-  * @hibernated:		True if core is hibernated
-+ * @reset_phy_on_wake:	Quirk saying that we should assert PHY reset on a
-+ *			remote wakeup.
-  * @frame_number:       Frame number read from the core. For both device
-  *			and host modes. The value ranges are from 0
-  *			to HFNUM_MAX_FRNUM.
-@@ -972,6 +974,7 @@ struct dwc2_hregs_backup {
-  * @status_buf_dma:     DMA address for status_buf
-  * @start_work:         Delayed work for handling host A-cable connection
-  * @reset_work:         Delayed work for handling a port reset
-+ * @phy_reset_work:     Work structure for doing a PHY reset
-  * @otg_port:           OTG port number
-  * @frame_list:         Frame list
-  * @frame_list_dma:     Frame list DMA address
-@@ -1045,6 +1048,7 @@ struct dwc2_hsotg {
- 	unsigned int gadget_enabled:1;
- 	unsigned int ll_hw_enabled:1;
- 	unsigned int hibernated:1;
-+	unsigned int reset_phy_on_wake:1;
- 	u16 frame_number;
- 
- 	struct phy *phy;
-@@ -1147,6 +1151,7 @@ struct dwc2_hsotg {
- 
- 	struct delayed_work start_work;
- 	struct delayed_work reset_work;
-+	struct work_struct phy_reset_work;
- 	u8 otg_port;
- 	u32 *frame_list;
- 	dma_addr_t frame_list_dma;
-@@ -1431,6 +1436,8 @@ int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg);
- int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg);
- int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg,
- 			       int rem_wakeup, int reset);
-+static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg)
-+{ schedule_work(&hsotg->phy_reset_work); }
- #else
- static inline int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg)
- { return 0; }
-@@ -1454,6 +1461,7 @@ static inline int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg)
- static inline int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg,
- 					     int rem_wakeup, int reset)
- { return 0; }
-+static inline void dwc2_host_schedule_phy_reset(struct dwc2_hsotg *hsotg) {}
- 
- #endif
- 
-diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
-index 19ae2595f1c3..6af6add3d4c0 100644
---- a/drivers/usb/dwc2/core_intr.c
-+++ b/drivers/usb/dwc2/core_intr.c
-@@ -435,6 +435,18 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
- 			/* Restart the Phy Clock */
- 			pcgcctl &= ~PCGCTL_STOPPCLK;
- 			dwc2_writel(hsotg, pcgcctl, PCGCTL);
-+
-+			/*
-+			 * If we've got this quirk then the PHY is stuck upon
-+			 * wakeup.  Assert reset.  This will propagate out and
-+			 * eventually we'll re-enumerate the device.  Not great
-+			 * but the best we can do.  We can't call phy_reset()
-+			 * at interrupt time but there's no hurry, so we'll
-+			 * schedule it for later.
-+			 */
-+			if (hsotg->reset_phy_on_wake)
-+				dwc2_host_schedule_phy_reset(hsotg);
-+
- 			mod_timer(&hsotg->wkp_timer,
- 				  jiffies + msecs_to_jiffies(71));
- 		} else {
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 8667ddf3ca74..978232a9e4a8 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -4376,6 +4376,17 @@ static void dwc2_hcd_reset_func(struct work_struct *work)
- 	spin_unlock_irqrestore(&hsotg->lock, flags);
- }
- 
-+static void dwc2_hcd_phy_reset_func(struct work_struct *work)
-+{
-+	struct dwc2_hsotg *hsotg = container_of(work, struct dwc2_hsotg,
-+						phy_reset_work);
-+	int ret;
-+
-+	ret = phy_reset(hsotg->phy);
-+	if (ret)
-+		dev_warn(hsotg->dev, "PHY reset failed\n");
-+}
-+
- /*
-  * =========================================================================
-  *  Linux HC Driver Functions
-@@ -5152,6 +5163,8 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
- 		destroy_workqueue(hsotg->wq_otg);
- 	}
- 
-+	cancel_work_sync(&hsotg->phy_reset_work);
-+
- 	del_timer(&hsotg->wkp_timer);
- }
- 
-@@ -5293,11 +5306,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
- 		hsotg->hc_ptr_array[i] = channel;
- 	}
- 
--	/* Initialize hsotg start work */
-+	/* Initialize work */
- 	INIT_DELAYED_WORK(&hsotg->start_work, dwc2_hcd_start_func);
--
--	/* Initialize port reset work */
- 	INIT_DELAYED_WORK(&hsotg->reset_work, dwc2_hcd_reset_func);
-+	INIT_WORK(&hsotg->phy_reset_work, dwc2_hcd_phy_reset_func);
- 
- 	/*
- 	 * Allocate space for storing data on status transactions. Normally no
-diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
-index 9aa9682a5cd2..c01fa8ffc0c8 100644
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -481,6 +481,15 @@ static int dwc2_driver_probe(struct platform_device *dev)
- 		hsotg->gadget_enabled = 1;
- 	}
- 
-+	hsotg->reset_phy_on_wake =
-+		of_property_read_bool(dev->dev.of_node,
-+				      "snps,reset-phy-on-wake");
-+	if (hsotg->reset_phy_on_wake && !hsotg->phy) {
-+		dev_warn(hsotg->dev,
-+			 "Quirk reset-phy-on-wake only supports generic PHYs\n");
-+		hsotg->reset_phy_on_wake = false;
-+	}
-+
- 	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
- 		retval = dwc2_hcd_init(hsotg);
- 		if (retval) {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0033-usb-dwc2-Move-UTMI_PHY_DATA-defines-closer.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0033-usb-dwc2-Move-UTMI_PHY_DATA-defines-closer.patch
deleted file mode 100644
index 5dcecc5..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0033-usb-dwc2-Move-UTMI_PHY_DATA-defines-closer.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From a89bae709b3492b478480a2c9734e7e9393b279c Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Fri, 5 Apr 2019 15:35:29 +0200
-Subject: [PATCH 33/53] usb: dwc2: Move UTMI_PHY_DATA defines closer
-
-Makes GHWCFG4_UTMI_PHY_DATA* defines closer to their relative shift and
-mask defines to improve readability.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hw.h | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
-index 1bc394dcfa9d..510e87ec0be8 100644
---- a/drivers/usb/dwc2/hw.h
-+++ b/drivers/usb/dwc2/hw.h
-@@ -310,12 +310,12 @@
- #define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT	16
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK	(0x3 << 14)
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT	14
--#define GHWCFG4_ACG_SUPPORTED			BIT(12)
--#define GHWCFG4_IPG_ISOC_SUPPORTED		BIT(11)
--#define GHWCFG4_SERVICE_INTERVAL_SUPPORTED      BIT(10)
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8		0
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_16		1
- #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16	2
-+#define GHWCFG4_ACG_SUPPORTED			BIT(12)
-+#define GHWCFG4_IPG_ISOC_SUPPORTED		BIT(11)
-+#define GHWCFG4_SERVICE_INTERVAL_SUPPORTED      BIT(10)
- #define GHWCFG4_XHIBER				BIT(7)
- #define GHWCFG4_HIBER				BIT(6)
- #define GHWCFG4_MIN_AHB_FREQ			BIT(5)
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0034-usb-dwc2-gadget-Remove-duplicated-phy-init.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0034-usb-dwc2-gadget-Remove-duplicated-phy-init.patch
deleted file mode 100644
index 397c585..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0034-usb-dwc2-gadget-Remove-duplicated-phy-init.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From fb26b553bf2627ff96c38236daab0138a82c613a Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Fri, 5 Apr 2019 15:35:30 +0200
-Subject: [PATCH 34/53] usb: dwc2: gadget: Remove duplicated phy init
-
-The function dwc2_hsotg_init is only called once just before calling
-dwc2_hsotg_core_init_disconnected which does the same initialization:
-setting the usbcfg register with turnaround time, timeout calibration
-and phy width.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 13 -------------
- 1 file changed, 13 deletions(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 6ac850d6ad44..9b737c4e8f50 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -4328,8 +4328,6 @@ static const struct usb_ep_ops dwc2_hsotg_ep_ops = {
-  */
- static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
- {
--	u32 trdtim;
--	u32 usbcfg;
- 	/* unmask subset of endpoint interrupts */
- 
- 	dwc2_writel(hsotg, DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK |
-@@ -4353,17 +4351,6 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
- 
- 	dwc2_hsotg_init_fifo(hsotg);
- 
--	/* keep other bits untouched (so e.g. forced modes are not lost) */
--	usbcfg = dwc2_readl(hsotg, GUSBCFG);
--	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
--		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
--
--	/* set the PLL on, remove the HNP/SRP and set the PHY */
--	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
--	usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
--		(trdtim << GUSBCFG_USBTRDTIM_SHIFT);
--	dwc2_writel(hsotg, usbcfg, GUSBCFG);
--
- 	if (using_dma(hsotg))
- 		dwc2_set_bit(hsotg, GAHBCFG, GAHBCFG_DMA_EN);
- }
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0035-usb-dwc2-gadget-Replace-phyif-with-phy_utmi_width.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0035-usb-dwc2-gadget-Replace-phyif-with-phy_utmi_width.patch
deleted file mode 100644
index 824c0ba..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0035-usb-dwc2-gadget-Replace-phyif-with-phy_utmi_width.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 707d80f0a3c5fb58e61404277f6b103955fac294 Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Fri, 5 Apr 2019 15:35:31 +0200
-Subject: [PATCH 35/53] usb: dwc2: gadget: Replace phyif with phy_utmi_width
-
-The phy utmi width information is already set in hsotg params,
-phyif is only used in few places and I don't see any reason to
-not use hsotg's params.
-
-Moreover the utmi width was being forced to 16 bits by platform
-initialization which doesn't take in account HW configuration.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h     |  2 --
- drivers/usb/dwc2/gadget.c   | 20 ++++++++++++++------
- drivers/usb/dwc2/platform.c |  5 +----
- 3 files changed, 15 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 764c78ebee28..8e3edf10d76d 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -871,7 +871,6 @@ struct dwc2_hregs_backup {
-  *                      removed once all SoCs support usb transceiver.
-  * @supplies:           Definition of USB power supplies
-  * @vbus_supply:        Regulator supplying vbus.
-- * @phyif:              PHY interface width
-  * @lock:		Spinlock that protects all the driver data structures
-  * @priv:		Stores a pointer to the struct usb_hcd
-  * @queuing_high_bandwidth: True if multiple packets of a high-bandwidth
-@@ -1056,7 +1055,6 @@ struct dwc2_hsotg {
- 	struct dwc2_hsotg_plat *plat;
- 	struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
- 	struct regulator *vbus_supply;
--	u32 phyif;
- 
- 	spinlock_t lock;
- 	void *priv;
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 9b737c4e8f50..614f8c34d759 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -3314,20 +3314,28 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
- 
- 	/* keep other bits untouched (so e.g. forced modes are not lost) */
- 	usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+	/* remove the HNP/SRP */
- 	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
--		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
-+		GUSBCFG_HNPCAP);
-+	usbcfg |= GUSBCFG_TOUTCAL(7);
- 
- 	if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
- 	    (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
- 	     hsotg->params.speed == DWC2_SPEED_PARAM_LOW)) {
- 		/* FS/LS Dedicated Transceiver Interface */
- 		usbcfg |= GUSBCFG_PHYSEL;
--	} else {
--		/* set the PLL on, remove the HNP/SRP and set the PHY */
--		val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
--		usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
--			(val << GUSBCFG_USBTRDTIM_SHIFT);
-+	} else if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_UTMI) {
-+		if (hsotg->params.phy_utmi_width == 16)
-+			usbcfg |= GUSBCFG_PHYIF16;
-+
-+		/* Set turnaround time */
-+		usbcfg &= ~GUSBCFG_USBTRDTIM_MASK;
-+		if (hsotg->params.phy_utmi_width == 16)
-+			usbcfg |= 5 << GUSBCFG_USBTRDTIM_SHIFT;
-+		else
-+			usbcfg |= 9 << GUSBCFG_USBTRDTIM_SHIFT;
- 	}
-+
- 	dwc2_writel(hsotg, usbcfg, GUSBCFG);
- 
- 	dwc2_hsotg_init_fifo(hsotg);
-diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
-index c01fa8ffc0c8..d10a7f8daec3 100644
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -230,9 +230,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
- 
- 	reset_control_deassert(hsotg->reset_ecc);
- 
--	/* Set default UTMI width */
--	hsotg->phyif = GUSBCFG_PHYIF16;
--
- 	/*
- 	 * Attempt to find a generic PHY, then look for an old style
- 	 * USB PHY and then fall back to pdata
-@@ -280,7 +277,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
- 		 * width is 8-bit and set the phyif appropriately.
- 		 */
- 		if (phy_get_bus_width(hsotg->phy) == 8)
--			hsotg->phyif = GUSBCFG_PHYIF8;
-+			hsotg->params.phy_utmi_width = 8;
- 	}
- 
- 	/* Clock */
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0036-usb-dwc2-Move-phy-init-into-core.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0036-usb-dwc2-Move-phy-init-into-core.patch
deleted file mode 100644
index 796233e..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0036-usb-dwc2-Move-phy-init-into-core.patch
+++ /dev/null
@@ -1,436 +0,0 @@
-From 059d8d528718407435216251eff8b49935b92b34 Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Fri, 5 Apr 2019 15:35:32 +0200
-Subject: [PATCH 36/53] usb: dwc2: Move phy init into core
-
-As the phy initialization is almost the same in host and gadget
-mode. This only move the phy initialization functions into core.c
-for now, the goal is to share theses functions between the two modes.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.c | 190 ++++++++++++++++++++++++++++++++++++++++++++++++
- drivers/usb/dwc2/core.h |   2 +
- drivers/usb/dwc2/hcd.c  | 190 ------------------------------------------------
- 3 files changed, 192 insertions(+), 190 deletions(-)
-
-diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
-index 55d5ae2a7ec7..01ac4a064feb 100644
---- a/drivers/usb/dwc2/core.c
-+++ b/drivers/usb/dwc2/core.c
-@@ -1020,6 +1020,196 @@ int dwc2_hsotg_wait_bit_clear(struct dwc2_hsotg *hsotg, u32 offset, u32 mask,
- 	return -ETIMEDOUT;
- }
- 
-+/*
-+ * Initializes the FSLSPClkSel field of the HCFG register depending on the
-+ * PHY type
-+ */
-+void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
-+{
-+	u32 hcfg, val;
-+
-+	if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
-+	     hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
-+	     hsotg->params.ulpi_fs_ls) ||
-+	    hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
-+		/* Full speed PHY */
-+		val = HCFG_FSLSPCLKSEL_48_MHZ;
-+	} else {
-+		/* High speed PHY running at full speed or high speed */
-+		val = HCFG_FSLSPCLKSEL_30_60_MHZ;
-+	}
-+
-+	dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
-+	hcfg = dwc2_readl(hsotg, HCFG);
-+	hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
-+	hcfg |= val << HCFG_FSLSPCLKSEL_SHIFT;
-+	dwc2_writel(hsotg, hcfg, HCFG);
-+}
-+
-+static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
-+{
-+	u32 usbcfg, ggpio, i2cctl;
-+	int retval = 0;
-+
-+	/*
-+	 * core_init() is now called on every switch so only call the
-+	 * following for the first time through
-+	 */
-+	if (select_phy) {
-+		dev_dbg(hsotg->dev, "FS PHY selected\n");
-+
-+		usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+		if (!(usbcfg & GUSBCFG_PHYSEL)) {
-+			usbcfg |= GUSBCFG_PHYSEL;
-+			dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+
-+			/* Reset after a PHY select */
-+			retval = dwc2_core_reset(hsotg, false);
-+
-+			if (retval) {
-+				dev_err(hsotg->dev,
-+					"%s: Reset failed, aborting", __func__);
-+				return retval;
-+			}
-+		}
-+
-+		if (hsotg->params.activate_stm_fs_transceiver) {
-+			ggpio = dwc2_readl(hsotg, GGPIO);
-+			if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
-+				dev_dbg(hsotg->dev, "Activating transceiver\n");
-+				/*
-+				 * STM32F4x9 uses the GGPIO register as general
-+				 * core configuration register.
-+				 */
-+				ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
-+				dwc2_writel(hsotg, ggpio, GGPIO);
-+			}
-+		}
-+	}
-+
-+	/*
-+	 * Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also
-+	 * do this on HNP Dev/Host mode switches (done in dev_init and
-+	 * host_init).
-+	 */
-+	if (dwc2_is_host_mode(hsotg))
-+		dwc2_init_fs_ls_pclk_sel(hsotg);
-+
-+	if (hsotg->params.i2c_enable) {
-+		dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
-+
-+		/* Program GUSBCFG.OtgUtmiFsSel to I2C */
-+		usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+		usbcfg |= GUSBCFG_OTG_UTMI_FS_SEL;
-+		dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+
-+		/* Program GI2CCTL.I2CEn */
-+		i2cctl = dwc2_readl(hsotg, GI2CCTL);
-+		i2cctl &= ~GI2CCTL_I2CDEVADDR_MASK;
-+		i2cctl |= 1 << GI2CCTL_I2CDEVADDR_SHIFT;
-+		i2cctl &= ~GI2CCTL_I2CEN;
-+		dwc2_writel(hsotg, i2cctl, GI2CCTL);
-+		i2cctl |= GI2CCTL_I2CEN;
-+		dwc2_writel(hsotg, i2cctl, GI2CCTL);
-+	}
-+
-+	return retval;
-+}
-+
-+static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
-+{
-+	u32 usbcfg, usbcfg_old;
-+	int retval = 0;
-+
-+	if (!select_phy)
-+		return 0;
-+
-+	usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+	usbcfg_old = usbcfg;
-+
-+	/*
-+	 * HS PHY parameters. These parameters are preserved during soft reset
-+	 * so only program the first time. Do a soft reset immediately after
-+	 * setting phyif.
-+	 */
-+	switch (hsotg->params.phy_type) {
-+	case DWC2_PHY_TYPE_PARAM_ULPI:
-+		/* ULPI interface */
-+		dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
-+		usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
-+		usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
-+		if (hsotg->params.phy_ulpi_ddr)
-+			usbcfg |= GUSBCFG_DDRSEL;
-+
-+		/* Set external VBUS indicator as needed. */
-+		if (hsotg->params.oc_disable)
-+			usbcfg |= (GUSBCFG_ULPI_INT_VBUS_IND |
-+				   GUSBCFG_INDICATORPASSTHROUGH);
-+		break;
-+	case DWC2_PHY_TYPE_PARAM_UTMI:
-+		/* UTMI+ interface */
-+		dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n");
-+		usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
-+		if (hsotg->params.phy_utmi_width == 16)
-+			usbcfg |= GUSBCFG_PHYIF16;
-+		break;
-+	default:
-+		dev_err(hsotg->dev, "FS PHY selected at HS!\n");
-+		break;
-+	}
-+
-+	if (usbcfg != usbcfg_old) {
-+		dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+
-+		/* Reset after setting the PHY parameters */
-+		retval = dwc2_core_reset(hsotg, false);
-+		if (retval) {
-+			dev_err(hsotg->dev,
-+				"%s: Reset failed, aborting", __func__);
-+			return retval;
-+		}
-+	}
-+
-+	return retval;
-+}
-+
-+int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
-+{
-+	u32 usbcfg;
-+	int retval = 0;
-+
-+	if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
-+	     hsotg->params.speed == DWC2_SPEED_PARAM_LOW) &&
-+	    hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
-+		/* If FS/LS mode with FS/LS PHY */
-+		retval = dwc2_fs_phy_init(hsotg, select_phy);
-+		if (retval)
-+			return retval;
-+	} else {
-+		/* High speed PHY */
-+		retval = dwc2_hs_phy_init(hsotg, select_phy);
-+		if (retval)
-+			return retval;
-+	}
-+
-+	if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
-+	    hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
-+	    hsotg->params.ulpi_fs_ls) {
-+		dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
-+		usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+		usbcfg |= GUSBCFG_ULPI_FS_LS;
-+		usbcfg |= GUSBCFG_ULPI_CLK_SUSP_M;
-+		dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+	} else {
-+		usbcfg = dwc2_readl(hsotg, GUSBCFG);
-+		usbcfg &= ~GUSBCFG_ULPI_FS_LS;
-+		usbcfg &= ~GUSBCFG_ULPI_CLK_SUSP_M;
-+		dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+	}
-+
-+	return retval;
-+}
-+
- MODULE_DESCRIPTION("DESIGNWARE HS OTG Core");
- MODULE_AUTHOR("Synopsys, Inc.");
- MODULE_LICENSE("Dual BSD/GPL");
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 8e3edf10d76d..9f3fc8e18277 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -1286,6 +1286,8 @@ int dwc2_exit_partial_power_down(struct dwc2_hsotg *hsotg, bool restore);
- int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg, int is_host);
- int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup,
- 		int reset, int is_host);
-+void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg);
-+int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy);
- 
- void dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host);
- void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg);
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 978232a9e4a8..7ac7b524243d 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -97,196 +97,6 @@ static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
- 	dwc2_writel(hsotg, intmsk, GINTMSK);
- }
- 
--/*
-- * Initializes the FSLSPClkSel field of the HCFG register depending on the
-- * PHY type
-- */
--static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
--{
--	u32 hcfg, val;
--
--	if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
--	     hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
--	     hsotg->params.ulpi_fs_ls) ||
--	    hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
--		/* Full speed PHY */
--		val = HCFG_FSLSPCLKSEL_48_MHZ;
--	} else {
--		/* High speed PHY running at full speed or high speed */
--		val = HCFG_FSLSPCLKSEL_30_60_MHZ;
--	}
--
--	dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
--	hcfg = dwc2_readl(hsotg, HCFG);
--	hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
--	hcfg |= val << HCFG_FSLSPCLKSEL_SHIFT;
--	dwc2_writel(hsotg, hcfg, HCFG);
--}
--
--static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
--{
--	u32 usbcfg, ggpio, i2cctl;
--	int retval = 0;
--
--	/*
--	 * core_init() is now called on every switch so only call the
--	 * following for the first time through
--	 */
--	if (select_phy) {
--		dev_dbg(hsotg->dev, "FS PHY selected\n");
--
--		usbcfg = dwc2_readl(hsotg, GUSBCFG);
--		if (!(usbcfg & GUSBCFG_PHYSEL)) {
--			usbcfg |= GUSBCFG_PHYSEL;
--			dwc2_writel(hsotg, usbcfg, GUSBCFG);
--
--			/* Reset after a PHY select */
--			retval = dwc2_core_reset(hsotg, false);
--
--			if (retval) {
--				dev_err(hsotg->dev,
--					"%s: Reset failed, aborting", __func__);
--				return retval;
--			}
--		}
--
--		if (hsotg->params.activate_stm_fs_transceiver) {
--			ggpio = dwc2_readl(hsotg, GGPIO);
--			if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
--				dev_dbg(hsotg->dev, "Activating transceiver\n");
--				/*
--				 * STM32F4x9 uses the GGPIO register as general
--				 * core configuration register.
--				 */
--				ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
--				dwc2_writel(hsotg, ggpio, GGPIO);
--			}
--		}
--	}
--
--	/*
--	 * Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also
--	 * do this on HNP Dev/Host mode switches (done in dev_init and
--	 * host_init).
--	 */
--	if (dwc2_is_host_mode(hsotg))
--		dwc2_init_fs_ls_pclk_sel(hsotg);
--
--	if (hsotg->params.i2c_enable) {
--		dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
--
--		/* Program GUSBCFG.OtgUtmiFsSel to I2C */
--		usbcfg = dwc2_readl(hsotg, GUSBCFG);
--		usbcfg |= GUSBCFG_OTG_UTMI_FS_SEL;
--		dwc2_writel(hsotg, usbcfg, GUSBCFG);
--
--		/* Program GI2CCTL.I2CEn */
--		i2cctl = dwc2_readl(hsotg, GI2CCTL);
--		i2cctl &= ~GI2CCTL_I2CDEVADDR_MASK;
--		i2cctl |= 1 << GI2CCTL_I2CDEVADDR_SHIFT;
--		i2cctl &= ~GI2CCTL_I2CEN;
--		dwc2_writel(hsotg, i2cctl, GI2CCTL);
--		i2cctl |= GI2CCTL_I2CEN;
--		dwc2_writel(hsotg, i2cctl, GI2CCTL);
--	}
--
--	return retval;
--}
--
--static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
--{
--	u32 usbcfg, usbcfg_old;
--	int retval = 0;
--
--	if (!select_phy)
--		return 0;
--
--	usbcfg = dwc2_readl(hsotg, GUSBCFG);
--	usbcfg_old = usbcfg;
--
--	/*
--	 * HS PHY parameters. These parameters are preserved during soft reset
--	 * so only program the first time. Do a soft reset immediately after
--	 * setting phyif.
--	 */
--	switch (hsotg->params.phy_type) {
--	case DWC2_PHY_TYPE_PARAM_ULPI:
--		/* ULPI interface */
--		dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
--		usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
--		usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
--		if (hsotg->params.phy_ulpi_ddr)
--			usbcfg |= GUSBCFG_DDRSEL;
--
--		/* Set external VBUS indicator as needed. */
--		if (hsotg->params.oc_disable)
--			usbcfg |= (GUSBCFG_ULPI_INT_VBUS_IND |
--				   GUSBCFG_INDICATORPASSTHROUGH);
--		break;
--	case DWC2_PHY_TYPE_PARAM_UTMI:
--		/* UTMI+ interface */
--		dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n");
--		usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
--		if (hsotg->params.phy_utmi_width == 16)
--			usbcfg |= GUSBCFG_PHYIF16;
--		break;
--	default:
--		dev_err(hsotg->dev, "FS PHY selected at HS!\n");
--		break;
--	}
--
--	if (usbcfg != usbcfg_old) {
--		dwc2_writel(hsotg, usbcfg, GUSBCFG);
--
--		/* Reset after setting the PHY parameters */
--		retval = dwc2_core_reset(hsotg, false);
--		if (retval) {
--			dev_err(hsotg->dev,
--				"%s: Reset failed, aborting", __func__);
--			return retval;
--		}
--	}
--
--	return retval;
--}
--
--static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
--{
--	u32 usbcfg;
--	int retval = 0;
--
--	if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
--	     hsotg->params.speed == DWC2_SPEED_PARAM_LOW) &&
--	    hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
--		/* If FS/LS mode with FS/LS PHY */
--		retval = dwc2_fs_phy_init(hsotg, select_phy);
--		if (retval)
--			return retval;
--	} else {
--		/* High speed PHY */
--		retval = dwc2_hs_phy_init(hsotg, select_phy);
--		if (retval)
--			return retval;
--	}
--
--	if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
--	    hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
--	    hsotg->params.ulpi_fs_ls) {
--		dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
--		usbcfg = dwc2_readl(hsotg, GUSBCFG);
--		usbcfg |= GUSBCFG_ULPI_FS_LS;
--		usbcfg |= GUSBCFG_ULPI_CLK_SUSP_M;
--		dwc2_writel(hsotg, usbcfg, GUSBCFG);
--	} else {
--		usbcfg = dwc2_readl(hsotg, GUSBCFG);
--		usbcfg &= ~GUSBCFG_ULPI_FS_LS;
--		usbcfg &= ~GUSBCFG_ULPI_CLK_SUSP_M;
--		dwc2_writel(hsotg, usbcfg, GUSBCFG);
--	}
--
--	return retval;
--}
--
- static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
- {
- 	u32 ahbcfg = dwc2_readl(hsotg, GAHBCFG);
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0037-usb-dwc2-gadget-Move-gadget-phy-init-into-core-phy-i.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0037-usb-dwc2-gadget-Move-gadget-phy-init-into-core-phy-i.patch
deleted file mode 100644
index 1a1d1e2..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0037-usb-dwc2-gadget-Move-gadget-phy-init-into-core-phy-i.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 1e868545f2bb06f7dd4a1c97c5b9ed2615929cf0 Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Fri, 5 Apr 2019 15:35:33 +0200
-Subject: [PATCH 37/53] usb: dwc2: gadget: Move gadget phy init into core phy
- init
-
-Most of the phy initialization is shared between host and gadget,
-this adds the turnaround configuration only used by gadgets to
-the global phy init.
-
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.c   |  9 +++++++++
- drivers/usb/dwc2/gadget.c | 25 +++++--------------------
- 2 files changed, 14 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
-index 01ac4a064feb..8b499d643461 100644
---- a/drivers/usb/dwc2/core.c
-+++ b/drivers/usb/dwc2/core.c
-@@ -1152,6 +1152,15 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
- 		usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
- 		if (hsotg->params.phy_utmi_width == 16)
- 			usbcfg |= GUSBCFG_PHYIF16;
-+
-+		/* Set turnaround time */
-+		if (dwc2_is_device_mode(hsotg)) {
-+			usbcfg &= ~GUSBCFG_USBTRDTIM_MASK;
-+			if (hsotg->params.phy_utmi_width == 16)
-+				usbcfg |= 5 << GUSBCFG_USBTRDTIM_SHIFT;
-+			else
-+				usbcfg |= 9 << GUSBCFG_USBTRDTIM_SHIFT;
-+		}
- 		break;
- 	default:
- 		dev_err(hsotg->dev, "FS PHY selected at HS!\n");
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 614f8c34d759..2e2f9cbf6a3d 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -3314,29 +3314,14 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
- 
- 	/* keep other bits untouched (so e.g. forced modes are not lost) */
- 	usbcfg = dwc2_readl(hsotg, GUSBCFG);
--	/* remove the HNP/SRP */
--	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
--		GUSBCFG_HNPCAP);
-+	usbcfg &= ~GUSBCFG_TOUTCAL_MASK;
- 	usbcfg |= GUSBCFG_TOUTCAL(7);
- 
--	if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
--	    (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
--	     hsotg->params.speed == DWC2_SPEED_PARAM_LOW)) {
--		/* FS/LS Dedicated Transceiver Interface */
--		usbcfg |= GUSBCFG_PHYSEL;
--	} else if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_UTMI) {
--		if (hsotg->params.phy_utmi_width == 16)
--			usbcfg |= GUSBCFG_PHYIF16;
--
--		/* Set turnaround time */
--		usbcfg &= ~GUSBCFG_USBTRDTIM_MASK;
--		if (hsotg->params.phy_utmi_width == 16)
--			usbcfg |= 5 << GUSBCFG_USBTRDTIM_SHIFT;
--		else
--			usbcfg |= 9 << GUSBCFG_USBTRDTIM_SHIFT;
--	}
-+	/* remove the HNP/SRP and set the PHY */
-+	usbcfg &= ~(GUSBCFG_SRPCAP | GUSBCFG_HNPCAP);
-+        dwc2_writel(hsotg, usbcfg, GUSBCFG);
- 
--	dwc2_writel(hsotg, usbcfg, GUSBCFG);
-+	dwc2_phy_init(hsotg, true);
- 
- 	dwc2_hsotg_init_fifo(hsotg);
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0038-usb-dwc2-Delayed-status-support.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0038-usb-dwc2-Delayed-status-support.patch
deleted file mode 100644
index 6655e8b..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0038-usb-dwc2-Delayed-status-support.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From b4c53b4ac66a75a93672abf08aafac64dfb08d00 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Tue, 12 Mar 2019 11:45:12 +0400
-Subject: [PATCH 38/53] usb: dwc2: Delayed status support
-
-Added delayed status support for Control transfers.
-
-Tested in all 3 modes: Slave, BDMA and DDMA.
-Performed tests: USB CV (Ch9 and MSC), Control Read/Write tests
-using Synopsys USB test environment function driver.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/core.h   |  2 ++
- drivers/usb/dwc2/gadget.c | 31 +++++++++++++++++++++++++++----
- 2 files changed, 29 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index 9f3fc8e18277..152ac41dfb2d 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -993,6 +993,7 @@ struct dwc2_hregs_backup {
-  * @ctrl_buff:          Buffer for EP0 control requests.
-  * @ctrl_req:           Request for EP0 control packets.
-  * @ep0_state:          EP0 control transfers state
-+ * @delayed_status:		true when gadget driver asks for delayed status
-  * @test_mode:          USB test mode requested by the host
-  * @remote_wakeup_allowed: True if device is allowed to wake-up host by
-  *                      remote-wakeup signalling
-@@ -1175,6 +1176,7 @@ struct dwc2_hsotg {
- 	void *ep0_buff;
- 	void *ctrl_buff;
- 	enum dwc2_ep0_state ep0_state;
-+	unsigned delayed_status : 1;
- 	u8 test_mode;
- 
- 	dma_addr_t setup_desc_dma[2];
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 2e2f9cbf6a3d..5f314a10a116 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -27,6 +27,8 @@
- #include <linux/usb/ch9.h>
- #include <linux/usb/gadget.h>
- #include <linux/usb/phy.h>
-+#include <linux/usb/composite.h>
-+
- 
- #include "core.h"
- #include "hw.h"
-@@ -1446,6 +1448,11 @@ static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
- 		return 0;
- 	}
- 
-+	/* Change EP direction if status phase request is after data out */
-+	if (!hs_ep->index && !req->length && !hs_ep->dir_in &&
-+	    hs->ep0_state == DWC2_EP0_DATA_OUT)
-+		hs_ep->dir_in = 1;
-+
- 	if (first) {
- 		if (!hs_ep->isochronous) {
- 			dwc2_hsotg_start_req(hs, hs_ep, hs_req, false);
-@@ -1938,6 +1945,10 @@ static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg,
- 			dev_dbg(hsotg->dev, "driver->setup() ret %d\n", ret);
- 	}
- 
-+	hsotg->delayed_status = false;
-+	if (ret == USB_GADGET_DELAYED_STATUS)
-+		hsotg->delayed_status = true;
-+
- 	/*
- 	 * the request is either unhandlable, or is not formatted correctly
- 	 * so respond with a STALL for the status stage to indicate failure.
-@@ -2387,8 +2398,8 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
- 	if (!using_desc_dma(hsotg) && epnum == 0 &&
- 	    hsotg->ep0_state == DWC2_EP0_DATA_OUT) {
- 		/* Move to STATUS IN */
--		dwc2_hsotg_ep0_zlp(hsotg, true);
--		return;
-+		if (!hsotg->delayed_status)
-+			dwc2_hsotg_ep0_zlp(hsotg, true);
- 	}
- 
- 	/*
-@@ -3053,8 +3064,20 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
- 		/* Safety check EP0 state when STSPHSERCVD asserted */
- 		if (hsotg->ep0_state == DWC2_EP0_DATA_OUT) {
- 			/* Move to STATUS IN for DDMA */
--			if (using_desc_dma(hsotg))
--				dwc2_hsotg_ep0_zlp(hsotg, true);
-+			if (using_desc_dma(hsotg)) {
-+				if (!hsotg->delayed_status)
-+					dwc2_hsotg_ep0_zlp(hsotg, true);
-+				else
-+				/* In case of 3 stage Control Write with delayed
-+				 * status, when Status IN transfer started
-+				 * before STSPHSERCVD asserted, NAKSTS bit not
-+				 * cleared by CNAK in dwc2_hsotg_start_req()
-+				 * function. Clear now NAKSTS to allow complete
-+				 * transfer.
-+				 */
-+					dwc2_set_bit(hsotg, DIEPCTL(0),
-+						     DXEPCTL_CNAK);
-+			}
- 		}
- 
- 	}
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0040-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0040-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch
deleted file mode 100644
index d8d261f..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0040-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From c8006f67ae0371900e601112d9f9cd8fff1c8387 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Tue, 12 Mar 2019 13:27:46 +0400
-Subject: [PATCH 40/53] usb: dwc2: Set actual frame number for completed ISOC
- transfer
-
-On ISOC transfer completion, in DDMA mode, set actual frame
-number returning to function driver in usb_request.
-
-Due to core limitation, returning frame number is 11-bit wide.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index fafd9cc9c8b2..a17e444e467b 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -2166,6 +2166,11 @@ static void dwc2_gadget_complete_isoc_request_ddma(struct dwc2_hsotg_ep *hs_ep)
- 			 */
- 			if (!hs_ep->dir_in && ureq->length & 0x3)
- 				ureq->actual += 4 - (ureq->length & 0x3);
-+
-+			/* Set actual frame number for completed transfers */
-+			ureq->frame_number =
-+				(desc_sts & DEV_DMA_ISOC_FRNUM_MASK) >>
-+				DEV_DMA_ISOC_FRNUM_SHIFT;
- 		}
- 
- 		dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0);
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0041-usb-dwc2-Fix-channel-disable-flow.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0041-usb-dwc2-Fix-channel-disable-flow.patch
deleted file mode 100644
index ac0bf22..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0041-usb-dwc2-Fix-channel-disable-flow.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 5799aecd64f2bb6c8175a2e86fbcb9e60d052221 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Tue, 5 Mar 2019 15:08:55 +0400
-Subject: [PATCH 41/53] usb: dwc2: Fix channel disable flow
-
-Channel disabling/halting should performed for enabled only channels
-to avoid warnings "Unable to clear enable on channel N" which seen
-if host works in Slave mode.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/hcd.c | 34 ++++++++++++++++++++--------------
- 1 file changed, 20 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
-index 7ac7b524243d..b50ec3714fd8 100644
---- a/drivers/usb/dwc2/hcd.c
-+++ b/drivers/usb/dwc2/hcd.c
-@@ -2247,25 +2247,31 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
- 		num_channels = hsotg->params.host_channels;
- 		for (i = 0; i < num_channels; i++) {
- 			hcchar = dwc2_readl(hsotg, HCCHAR(i));
--			hcchar &= ~HCCHAR_CHENA;
--			hcchar |= HCCHAR_CHDIS;
--			hcchar &= ~HCCHAR_EPDIR;
--			dwc2_writel(hsotg, hcchar, HCCHAR(i));
-+			if (hcchar & HCCHAR_CHENA) {
-+				hcchar &= ~HCCHAR_CHENA;
-+				hcchar |= HCCHAR_CHDIS;
-+				hcchar &= ~HCCHAR_EPDIR;
-+				dwc2_writel(hsotg, hcchar, HCCHAR(i));
-+			}
- 		}
- 
- 		/* Halt all channels to put them into a known state */
- 		for (i = 0; i < num_channels; i++) {
- 			hcchar = dwc2_readl(hsotg, HCCHAR(i));
--			hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS;
--			hcchar &= ~HCCHAR_EPDIR;
--			dwc2_writel(hsotg, hcchar, HCCHAR(i));
--			dev_dbg(hsotg->dev, "%s: Halt channel %d\n",
--				__func__, i);
--
--			if (dwc2_hsotg_wait_bit_clear(hsotg, HCCHAR(i),
--						      HCCHAR_CHENA, 1000)) {
--				dev_warn(hsotg->dev, "Unable to clear enable on channel %d\n",
--					 i);
-+			if (hcchar & HCCHAR_CHENA) {
-+				hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS;
-+				hcchar &= ~HCCHAR_EPDIR;
-+				dwc2_writel(hsotg, hcchar, HCCHAR(i));
-+				dev_dbg(hsotg->dev, "%s: Halt channel %d\n",
-+					__func__, i);
-+
-+				if (dwc2_hsotg_wait_bit_clear(hsotg, HCCHAR(i),
-+							      HCCHAR_CHENA,
-+							      1000)) {
-+					dev_warn(hsotg->dev,
-+						 "Unable to clear enable on channel %d\n",
-+						 i);
-+				}
- 			}
- 		}
- 	}
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0042-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-config.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0042-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-config.patch
deleted file mode 100644
index e211c5a..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0042-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-config.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 28b5c129ca6e585ec95c160ec4297bc6c6360b6f Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Mon, 4 Mar 2019 17:08:07 +0400
-Subject: [PATCH 42/53] usb: dwc2: Set lpm mode parameters depend on HW
- configuration
-
-If core not supported lpm, i.e. BCM2835 then confusing warnings seen
-in log.
-
-To avoid these warnings, added function dwc2_set_param_lpm() to set
-lpm and other lpm related parameters based on lpm support by core.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/params.c | 23 ++++++++++++++++++-----
- 1 file changed, 18 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index 442113246cba..6900eea57526 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -285,6 +285,23 @@ static void dwc2_set_param_power_down(struct dwc2_hsotg *hsotg)
- 	hsotg->params.power_down = val;
- }
- 
-+static void dwc2_set_param_lpm(struct dwc2_hsotg *hsotg)
-+{
-+	struct dwc2_core_params *p = &hsotg->params;
-+
-+	p->lpm = hsotg->hw_params.lpm_mode;
-+	if (p->lpm) {
-+		p->lpm_clock_gating = true;
-+		p->besl = true;
-+		p->hird_threshold_en = true;
-+		p->hird_threshold = 4;
-+	} else {
-+		p->lpm_clock_gating = false;
-+		p->besl = false;
-+		p->hird_threshold_en = false;
-+	}
-+}
-+
- /**
-  * dwc2_set_default_params() - Set all core parameters to their
-  * auto-detected default values.
-@@ -303,6 +320,7 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
- 	dwc2_set_param_speed(hsotg);
- 	dwc2_set_param_phy_utmi_width(hsotg);
- 	dwc2_set_param_power_down(hsotg);
-+	dwc2_set_param_lpm(hsotg);
- 	p->phy_ulpi_ddr = false;
- 	p->phy_ulpi_ext_vbus = false;
- 
-@@ -315,11 +333,6 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
- 	p->reload_ctl = (hw->snpsid >= DWC2_CORE_REV_2_92a);
- 	p->uframe_sched = true;
- 	p->external_id_pin_ctl = false;
--	p->lpm = true;
--	p->lpm_clock_gating = true;
--	p->besl = true;
--	p->hird_threshold_en = true;
--	p->hird_threshold = 4;
- 	p->ipg_isoc_en = false;
- 	p->service_interval = false;
- 	p->max_packet_count = hw->max_packet_count;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0043-dwc2-gadget-Fix-completed-transfer-size-calculation-.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0043-dwc2-gadget-Fix-completed-transfer-size-calculation-.patch
deleted file mode 100644
index 3ce11c3..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0043-dwc2-gadget-Fix-completed-transfer-size-calculation-.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5acb4b970184d189d901192d075997c933b82260 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <minas.harutyunyan@synopsys.com>
-Date: Fri, 22 Feb 2019 15:49:19 +0400
-Subject: [PATCH 43/53] dwc2: gadget: Fix completed transfer size calculation
- in DDMA
-
-Fix calculation of transfer size on completion in function
-dwc2_gadget_get_xfersize_ddma().
-
-Added increment of descriptor pointer to move to next descriptor in
-the loop.
-
-Fixes: aa3e8bc81311 ("usb: dwc2: gadget: DDMA transfer start and complete")
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index a17e444e467b..16ffd9fd9361 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -2325,6 +2325,7 @@ static unsigned int dwc2_gadget_get_xfersize_ddma(struct dwc2_hsotg_ep *hs_ep)
- 		if (status & DEV_DMA_STS_MASK)
- 			dev_err(hsotg->dev, "descriptor %d closed with %x\n",
- 				i, status & DEV_DMA_STS_MASK);
-+		desc++;
- 	}
- 
- 	return bytes_rem;
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0047-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0047-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch
deleted file mode 100644
index fa3bf64..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0047-usb-dwc2-Set-actual-frame-number-for-completed-ISOC-.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 4faf3b36553a0a5304f58ee3a620e659739a2e20 Mon Sep 17 00:00:00 2001
-From: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
-Date: Mon, 29 Apr 2019 15:23:43 +0400
-Subject: [PATCH 47/53] usb: dwc2: Set actual frame number for completed ISOC
- transfer for none DDMA
-
-On ISOC OUT transfer completion, in none DDMA mode, set actual frame
-number returning to function driver in usb_request.
-
-Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 16ffd9fd9361..1d4aef8d4137 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -2417,6 +2417,10 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
- 			dwc2_gadget_incr_frame_num(hs_ep);
- 	}
- 
-+	/* Set actual frame number for completed transfers */
-+	if (!using_desc_dma(hsotg) && hs_ep->isochronous)
-+		req->frame_number = hsotg->frame_number;
-+
- 	dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, result);
- }
- 
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0048-usb-gadget-dwc2-fix-zlp-handling.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0048-usb-gadget-dwc2-fix-zlp-handling.patch
deleted file mode 100644
index ff6314d..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0048-usb-gadget-dwc2-fix-zlp-handling.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 066cfd0770aba8a9ac79b59d99530653885d919d Mon Sep 17 00:00:00 2001
-From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
-Date: Mon, 1 Apr 2019 12:50:45 +0200
-Subject: [PATCH 48/53] usb: gadget: dwc2: fix zlp handling
-
-The patch 10209abe87f5ebfd482a00323f5236d6094d0865
-usb: dwc2: gadget: Add scatter-gather mode
-
-avoided a NULL pointer dereference (hs_ep->req == NULL) by
-calling dwc2_gadget_fill_nonisoc_xfer_dma_one() directly instead of through
-the dwc2_gadget_config_nonisoc_xfer_ddma() wrapper, which unconditionally
-dereferenced the said pointer.
-
-However, this was based on an incorrect assumption that in the context of
-dwc2_hsotg_program_zlp() the pointer is always NULL, which is not the case.
-The result were SB CV MSC tests failing starting from Test Case 6.
-
-Instead, this patch reverts to calling the wrapper and adds a check for
-the pointer being NULL inside the wrapper.
-
-Fixes: 10209abe87f5 (usb: dwc2: gadget: Add scatter-gather mode)
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/gadget.c | 20 ++++++++++++--------
- 1 file changed, 12 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
-index 1d4aef8d4137..bff48a8a1984 100644
---- a/drivers/usb/dwc2/gadget.c
-+++ b/drivers/usb/dwc2/gadget.c
-@@ -835,19 +835,22 @@ static void dwc2_gadget_fill_nonisoc_xfer_ddma_one(struct dwc2_hsotg_ep *hs_ep,
-  * with corresponding information based on transfer data.
-  */
- static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
--						 struct usb_request *ureq,
--						 unsigned int offset,
-+						 dma_addr_t dma_buff,
- 						 unsigned int len)
- {
-+	struct usb_request *ureq = NULL;
- 	struct dwc2_dma_desc *desc = hs_ep->desc_list;
- 	struct scatterlist *sg;
- 	int i;
- 	u8 desc_count = 0;
- 
-+	if (hs_ep->req)
-+		ureq = &hs_ep->req->req;
-+
- 	/* non-DMA sg buffer */
--	if (!ureq->num_sgs) {
-+	if (!ureq || !ureq->num_sgs) {
- 		dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc,
--			ureq->dma + offset, len, true);
-+			dma_buff, len, true);
- 		return;
- 	}
- 
-@@ -1135,7 +1138,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
- 			offset = ureq->actual;
- 
- 		/* Fill DDMA chain entries */
--		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq, offset,
-+		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq->dma + offset,
- 						     length);
- 
- 		/* write descriptor chain address to control register */
-@@ -2037,12 +2040,13 @@ static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
- 		dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n",
- 			index);
- 	if (using_desc_dma(hsotg)) {
-+		/* Not specific buffer needed for ep0 ZLP */
-+		dma_addr_t dma = hs_ep->desc_list_dma;
-+
- 		if (!index)
- 			dwc2_gadget_set_ep0_desc_chain(hsotg, hs_ep);
- 
--		/* Not specific buffer needed for ep0 ZLP */
--		dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &hs_ep->desc_list,
--			hs_ep->desc_list_dma, 0, true);
-+		dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, dma, 0);
- 	} else {
- 		dwc2_writel(hsotg, DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) |
- 			    DXEPTSIZ_XFERSIZE(0),
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0049-usb-dwc2-Use-generic-PHY-width-in-params-setup.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0049-usb-dwc2-Use-generic-PHY-width-in-params-setup.patch
deleted file mode 100644
index 5b0b3d2..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0049-usb-dwc2-Use-generic-PHY-width-in-params-setup.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 42de8afc40c97002fceb500e2331f6a722be3c14 Mon Sep 17 00:00:00 2001
-From: Jules Maselbas <jmaselbas@kalray.eu>
-Date: Thu, 9 May 2019 11:15:28 +0200
-Subject: [PATCH 49/53] usb: dwc2: Use generic PHY width in params setup
-
-Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since
-it's value will be overwritten by dwc2_init_params().
-
-This change make sure to take in account the generic PHY width information
-during paraminitialisation, done in dwc2_set_param_phy_utmi_width().
-
-By doing so, the phy_utmi_width params can still be overrided by
-devicetree specific params and will also be checked against hardware
-capabilities.
-
-Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/params.c   | 9 +++++++++
- drivers/usb/dwc2/platform.c | 9 ---------
- 2 files changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index 6900eea57526..5949262ff669 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -253,6 +253,15 @@ static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
- 	val = (hsotg->hw_params.utmi_phy_data_width ==
- 	       GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
- 
-+	if (hsotg->phy) {
-+		/*
-+		 * If using the generic PHY framework, check if the PHY bus
-+		 * width is 8-bit and set the phyif appropriately.
-+		 */
-+		if (phy_get_bus_width(hsotg->phy) == 8)
-+			val = 8;
-+	}
-+
- 	hsotg->params.phy_utmi_width = val;
- }
- 
-diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
-index d10a7f8daec3..e98d7812da2d 100644
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -271,15 +271,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
- 
- 	hsotg->plat = dev_get_platdata(hsotg->dev);
- 
--	if (hsotg->phy) {
--		/*
--		 * If using the generic PHY framework, check if the PHY bus
--		 * width is 8-bit and set the phyif appropriately.
--		 */
--		if (phy_get_bus_width(hsotg->phy) == 8)
--			hsotg->params.phy_utmi_width = 8;
--	}
--
- 	/* Clock */
- 	hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
- 	if (IS_ERR(hsotg->clk)) {
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0050-usb-dwc2-Force-8bit-UTMI-width-for-Samsung-Exynos-So.patch b/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0050-usb-dwc2-Force-8bit-UTMI-width-for-Samsung-Exynos-So.patch
deleted file mode 100644
index 7ee3fcf..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-dwc2/0050-usb-dwc2-Force-8bit-UTMI-width-for-Samsung-Exynos-So.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 1112cf4c4109473fd8a30a4678d25f9321ef5d67 Mon Sep 17 00:00:00 2001
-From: Marek Szyprowski <m.szyprowski@samsung.com>
-Date: Fri, 14 Jun 2019 08:52:53 +0200
-Subject: [PATCH 50/53] usb: dwc2: Force 8bit UTMI width for Samsung Exynos
- SoCs
-
-Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
-host side of the shared USB2 PHY doesn't work.
-
-Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
-Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
-Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Acked-by: Minas Harutyunyan <hminas@synopsys.com>
-Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
-Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/dwc2/params.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index 6900eea57526..9ece4affb9d4 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
- 	struct dwc2_core_params *p = &hsotg->params;
- 
- 	p->power_down = 0;
-+	p->phy_utmi_width = 8;
- }
- 
- static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/5.x-usb/export-usb_wakeup_enabled_descendants.patch b/resources/BuildResources/patches-tested/kernel/5.x-usb/export-usb_wakeup_enabled_descendants.patch
deleted file mode 100644
index 26ddbb6..0000000
--- a/resources/BuildResources/patches-tested/kernel/5.x-usb/export-usb_wakeup_enabled_descendants.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 7a6127e39a16c97b505f13352238567fdc3f79a2 Mon Sep 17 00:00:00 2001
-From: Douglas Anderson <dianders@chromium.org>
-Date: Wed, 17 Apr 2019 17:13:53 -0700
-Subject: [PATCH] USB: Export usb_wakeup_enabled_descendants()
-
-In (e583d9d USB: global suspend and remote wakeup don't mix) we
-introduced wakeup_enabled_descendants() as a static function.  We'd
-like to use this function in USB controller drivers to know if we
-should keep the controller on during suspend time, since doing so has
-a power impact.
-
-Signed-off-by: Douglas Anderson <dianders@chromium.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
----
- drivers/usb/core/hub.c  | 7 ++++---
- include/linux/usb/hcd.h | 5 +++++
- 2 files changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
-index 8d4631c81b9f0..5e8f3fa7ae5a9 100644
---- a/drivers/usb/core/hub.c
-+++ b/drivers/usb/core/hub.c
-@@ -3174,13 +3174,14 @@ static int usb_disable_remote_wakeup(struct usb_device *udev)
- }
- 
- /* Count of wakeup-enabled devices at or below udev */
--static unsigned wakeup_enabled_descendants(struct usb_device *udev)
-+unsigned usb_wakeup_enabled_descendants(struct usb_device *udev)
- {
- 	struct usb_hub *hub = usb_hub_to_struct_hub(udev);
- 
- 	return udev->do_remote_wakeup +
- 			(hub ? hub->wakeup_enabled_descendants : 0);
- }
-+EXPORT_SYMBOL_GPL(usb_wakeup_enabled_descendants);
- 
- /*
-  * usb_port_suspend - suspend a usb device's upstream port
-@@ -3282,7 +3283,7 @@ int usb_port_suspend(struct usb_device *udev, pm_message_t msg)
- 	 * Therefore we will turn on the suspend feature if udev or any of its
- 	 * descendants is enabled for remote wakeup.
- 	 */
--	else if (PMSG_IS_AUTO(msg) || wakeup_enabled_descendants(udev) > 0)
-+	else if (PMSG_IS_AUTO(msg) || usb_wakeup_enabled_descendants(udev) > 0)
- 		status = set_port_feature(hub->hdev, port1,
- 				USB_PORT_FEAT_SUSPEND);
- 	else {
-@@ -3687,7 +3688,7 @@ static int hub_suspend(struct usb_interface *intf, pm_message_t msg)
- 		}
- 		if (udev)
- 			hub->wakeup_enabled_descendants +=
--					wakeup_enabled_descendants(udev);
-+					usb_wakeup_enabled_descendants(udev);
- 	}
- 
- 	if (hdev->do_remote_wakeup && hub->quirk_check_port_auto_suspend) {
-diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
-index 695931b03684d..ed4fbbd1b35f5 100644
---- a/include/linux/usb/hcd.h
-+++ b/include/linux/usb/hcd.h
-@@ -652,11 +652,16 @@ extern wait_queue_head_t usb_kill_urb_queue;
- #define usb_endpoint_out(ep_dir)	(!((ep_dir) & USB_DIR_IN))
- 
- #ifdef CONFIG_PM
-+extern unsigned usb_wakeup_enabled_descendants(struct usb_device *udev);
- extern void usb_root_hub_lost_power(struct usb_device *rhdev);
- extern int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg);
- extern int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg);
- extern void usb_hcd_resume_root_hub(struct usb_hcd *hcd);
- #else
-+static inline unsigned usb_wakeup_enabled_descendants(struct usb_device *udev)
-+{
-+	return 0;
-+}
- static inline void usb_hcd_resume_root_hub(struct usb_hcd *hcd)
- {
- 	return;
diff --git a/resources/BuildResources/patches-tested/kernel/rockchip-dwc2-usb-partial-power-down.patch b/resources/BuildResources/patches-tested/kernel/rockchip-dwc2-usb-partial-power-down.patch
deleted file mode 100644
index 0f0f855..0000000
--- a/resources/BuildResources/patches-tested/kernel/rockchip-dwc2-usb-partial-power-down.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 04fbf78e4e569bf872f1ffcb0a6f9b89569dc913 Mon Sep 17 00:00:00 2001
-From: Hal Emmerich <hal@halemmerich.com>
-Date: Thu, 19 Jul 2018 21:48:08 -0500
-Subject: [PATCH] usb: dwc2: disable power_down on rockchip devices
-
- The bug would let the usb controller enter partial power down,
- which was formally known as hibernate, upon boot if nothing was plugged
- in to the port. Partial power down couldn't be exited properly, so any
- usb devices plugged in after boot would not be usable.
-
- Before the name change, params.hibernation was false by default, so
- _dwc2_hcd_suspend() would skip entering hibernation. With the
- rename, _dwc2_hcd_suspend() was changed to use  params.power_down
- to decide whether or not to enter partial power down.
-
- Since params.power_down is non-zero by default, it needs to be set
- to 0 for rockchip devices to restore functionality.
-
- This bug was reported in the linux-usb thread:
- REGRESSION: usb: dwc2: USB device not seen after boot
-
- The commit that caused this regression is:
- 6d23ee9caa6790aea047f9aca7f3c03cb8d96eb6
-
-Signed-off-by: Hal Emmerich <hal@halemmerich.com>
----
- drivers/usb/dwc2/params.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index f03e418..492607a 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -82,6 +82,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
- 	p->host_perio_tx_fifo_size = 256;
- 	p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
- 		GAHBCFG_HBSTLEN_SHIFT;
-+	p->power_down = 0;
- }
- 
- static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
--- 
-2.11.0
-
diff --git a/resources/BuildResources/patches-tested/kernel/usb-core-remove-local-irq-save-around-complete-handler.patch b/resources/BuildResources/patches-tested/kernel/usb-core-remove-local-irq-save-around-complete-handler.patch
deleted file mode 100644
index d31f791..0000000
--- a/resources/BuildResources/patches-tested/kernel/usb-core-remove-local-irq-save-around-complete-handler.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From ed194d1367698a0872a2b75bbe06b3932ce9df3a Mon Sep 17 00:00:00 2001
-From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
-Date: Mon, 10 Sep 2018 11:20:00 +0200
-Subject: [PATCH] usb: core: remove local_irq_save() around ->complete()
- handler
-
-The core disabled interrupts before invocation the ->complete handler
-because the handler might have expected that interrupts are disabled.
-
-All handlers were audited and use proper locking now. With it, the core
-code no longer needs to disable interrupts before invoking the
-->complete handler.
-Remove local_irq_save() statement before invoking the ->complete
-handler.
-
-Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/usb/core/hcd.c | 13 -------------
- 1 file changed, 13 deletions(-)
-
-diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
-index 1c21955fe7c00..f985d2303095c 100644
---- a/drivers/usb/core/hcd.c
-+++ b/drivers/usb/core/hcd.c
-@@ -1755,20 +1755,7 @@ static void __usb_hcd_giveback_urb(struct urb *urb)
- 
- 	/* pass ownership to the completion handler */
- 	urb->status = status;
--
--	/*
--	 * We disable local IRQs here avoid possible deadlock because
--	 * drivers may call spin_lock() to hold lock which might be
--	 * acquired in one hard interrupt handler.
--	 *
--	 * The local_irq_save()/local_irq_restore() around complete()
--	 * will be removed if current USB drivers have been cleaned up
--	 * and no one may trigger the above deadlock situation when
--	 * running complete() in tasklet.
--	 */
--	local_irq_save(flags);
- 	urb->complete(urb);
--	local_irq_restore(flags);
- 
- 	usb_anchor_resume_wakeups(anchor);
- 	atomic_dec(&urb->use_count);
diff --git a/scripts/buildKernel.sh b/scripts/buildKernel.sh
index 3580513..1da323c 100755
--- a/scripts/buildKernel.sh
+++ b/scripts/buildKernel.sh
@@ -25,7 +25,6 @@ then
 fi
 KVER=$1
 TEST_PATCHES=false
-
 ROOT_DIR=`pwd`
 RESOURCES=$ROOT_DIR/resources/BuildResources
 [ ! -d build ] && mkdir build
@@ -44,12 +43,10 @@ cd linux-$KVER
 make clean
 make mrproper
 #Apply the usb and mmc patches if unapplied
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/5.x-dwc2/*.patch; do echo $i; patch -p1 < $i; done
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/5.x-dts/*.patch; do echo $i; patch -p1 < $i; done
 [ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/*.patch; do echo $i; patch -p1 < $i; done
 [ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/*.patch; do echo $i; patch -p1 < $i; done
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/5.x-dwc2/*.patch; do echo $i; patch -p1 < $i; done
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/5.x-clk/*.patch; do echo $i; patch -p1 < $i; done
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/5.x-usb/*.patch; do echo $i; patch -p1 < $i; done
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/5.x-dts/*.patch; do echo $i; patch -p1 < $i; done
 #Apply all of the rockMyy patches that make sense
 [ "$TEST_PATCHES" = true ] && for i in $RESOURCES/patches-untested/kernel/*.patch; do patch -p1 < $i; done
 [ "$TEST_PATCHES" = true ] && for i in $RESOURCES/patches-untested/DTS/*.patch; do patch -p1 < $i; done
diff --git a/scripts/crossmenuconfig.sh b/scripts/crossmenuconfig.sh
index 11ebd28..92d3137 100755
--- a/scripts/crossmenuconfig.sh
+++ b/scripts/crossmenuconfig.sh
@@ -40,8 +40,10 @@ cd linux-$KVER
 make clean
 make mrproper
 #Apply the usb and mmc patches if unapplied
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/*.patch; do patch -p1 < $i; done
-[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/*.patch; do patch -p1 < $i; done
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/5.x-dwc2/*.patch; do echo $i; patch -p1 < $i; done
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/5.x-dts/*.patch; do echo $i; patch -p1 < $i; done
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/DTS/*.patch; do echo $i; patch -p1 < $i; done
+[ "$FRESH" = true ] && for i in $RESOURCES/patches-tested/kernel/*.patch; do echo $i; patch -p1 < $i; done
 #Apply all of the rockMyy patches that make sense
 [ "$TEST_PATCHES" = true ] && for i in $RESOURCES/patches-untested/kernel/*.patch; do patch -p1 < $i; done
 [ "$TEST_PATCHES" = true ] && for i in $RESOURCES/patches-untested/DTS/*.patch; do patch -p1 < $i; done