1cd8ae19a9
Add backported patched from 5.x from usb related fixes Up kernel version to most recent lts
81 lines
2.8 KiB
Diff
81 lines
2.8 KiB
Diff
From 15d9dbf8cbd4fc777a7fc92209903dbb47d0783e Mon Sep 17 00:00:00 2001
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From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
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Date: Wed, 29 Aug 2018 21:01:59 +0400
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Subject: [PATCH 12/53] usb: dwc2: gadget: Program GREFCLK register
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Added dwc2_gadget_program_ref_clk function to program GREFCLK
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register in device mode.
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Acked-by: Minas Harutyunyan <hminas@synopsys.com>
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Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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drivers/usb/dwc2/core.h | 2 ++
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drivers/usb/dwc2/gadget.c | 23 +++++++++++++++++++++++
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2 files changed, 25 insertions(+)
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diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
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index 655f5274e801..30bab8463c96 100644
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--- a/drivers/usb/dwc2/core.h
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+++ b/drivers/usb/dwc2/core.h
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@@ -1381,6 +1381,7 @@ int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg);
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int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg);
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int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg);
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void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg);
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+void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg);
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#else
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static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
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{ return 0; }
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@@ -1415,6 +1416,7 @@ static inline int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
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static inline int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
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{ return 0; }
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static inline void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg) {}
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+static inline void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg) {}
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#endif
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#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
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diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
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index 9de16453a890..e8dd6897e2c3 100644
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--- a/drivers/usb/dwc2/gadget.c
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+++ b/drivers/usb/dwc2/gadget.c
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@@ -3418,6 +3418,10 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
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/* configure the core to support LPM */
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dwc2_gadget_init_lpm(hsotg);
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+ /* program GREFCLK register if needed */
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+ if (using_desc_dma(hsotg) && hsotg->params.service_interval)
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+ dwc2_gadget_program_ref_clk(hsotg);
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+
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/* must be at-least 3ms to allow bus to see disconnect */
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mdelay(3);
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@@ -5002,6 +5006,25 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg)
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}
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/**
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+ * dwc2_gadget_program_ref_clk - Program GREFCLK register in device mode
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+ *
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+ * @hsotg: Programming view of DWC_otg controller
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+ *
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+ */
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+void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg)
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+{
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+ u32 val = 0;
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+
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+ val |= GREFCLK_REF_CLK_MODE;
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+ val |= hsotg->params.ref_clk_per << GREFCLK_REFCLKPER_SHIFT;
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+ val |= hsotg->params.sof_cnt_wkup_alert <<
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+ GREFCLK_SOF_CNT_WKUP_ALERT_SHIFT;
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+
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+ dwc2_writel(hsotg, val, GREFCLK);
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+ dev_dbg(hsotg->dev, "GREFCLK=0x%08x\n", dwc2_readl(hsotg, GREFCLK));
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+}
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+
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+/**
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* dwc2_gadget_enter_hibernation() - Put controller in Hibernation.
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*
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* @hsotg: Programming view of the DWC_otg controller
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--
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2.11.0
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