1cd8ae19a9
Add backported patched from 5.x from usb related fixes Up kernel version to most recent lts
107 lines
3.8 KiB
Diff
107 lines
3.8 KiB
Diff
From 707d80f0a3c5fb58e61404277f6b103955fac294 Mon Sep 17 00:00:00 2001
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From: Jules Maselbas <jmaselbas@kalray.eu>
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Date: Fri, 5 Apr 2019 15:35:31 +0200
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Subject: [PATCH 35/53] usb: dwc2: gadget: Replace phyif with phy_utmi_width
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The phy utmi width information is already set in hsotg params,
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phyif is only used in few places and I don't see any reason to
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not use hsotg's params.
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Moreover the utmi width was being forced to 16 bits by platform
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initialization which doesn't take in account HW configuration.
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Acked-by: Minas Harutyunyan <hminas@synopsys.com>
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Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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drivers/usb/dwc2/core.h | 2 --
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drivers/usb/dwc2/gadget.c | 20 ++++++++++++++------
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drivers/usb/dwc2/platform.c | 5 +----
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3 files changed, 15 insertions(+), 12 deletions(-)
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diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
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index 764c78ebee28..8e3edf10d76d 100644
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--- a/drivers/usb/dwc2/core.h
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+++ b/drivers/usb/dwc2/core.h
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@@ -871,7 +871,6 @@ struct dwc2_hregs_backup {
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* removed once all SoCs support usb transceiver.
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* @supplies: Definition of USB power supplies
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* @vbus_supply: Regulator supplying vbus.
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- * @phyif: PHY interface width
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* @lock: Spinlock that protects all the driver data structures
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* @priv: Stores a pointer to the struct usb_hcd
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* @queuing_high_bandwidth: True if multiple packets of a high-bandwidth
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@@ -1056,7 +1055,6 @@ struct dwc2_hsotg {
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struct dwc2_hsotg_plat *plat;
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struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
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struct regulator *vbus_supply;
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- u32 phyif;
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spinlock_t lock;
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void *priv;
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diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
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index 9b737c4e8f50..614f8c34d759 100644
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--- a/drivers/usb/dwc2/gadget.c
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+++ b/drivers/usb/dwc2/gadget.c
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@@ -3314,20 +3314,28 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
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/* keep other bits untouched (so e.g. forced modes are not lost) */
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usbcfg = dwc2_readl(hsotg, GUSBCFG);
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+ /* remove the HNP/SRP */
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usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
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- GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
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+ GUSBCFG_HNPCAP);
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+ usbcfg |= GUSBCFG_TOUTCAL(7);
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if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
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(hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
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hsotg->params.speed == DWC2_SPEED_PARAM_LOW)) {
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/* FS/LS Dedicated Transceiver Interface */
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usbcfg |= GUSBCFG_PHYSEL;
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- } else {
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- /* set the PLL on, remove the HNP/SRP and set the PHY */
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- val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
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- usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
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- (val << GUSBCFG_USBTRDTIM_SHIFT);
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+ } else if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_UTMI) {
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+ if (hsotg->params.phy_utmi_width == 16)
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+ usbcfg |= GUSBCFG_PHYIF16;
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+
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+ /* Set turnaround time */
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+ usbcfg &= ~GUSBCFG_USBTRDTIM_MASK;
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+ if (hsotg->params.phy_utmi_width == 16)
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+ usbcfg |= 5 << GUSBCFG_USBTRDTIM_SHIFT;
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+ else
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+ usbcfg |= 9 << GUSBCFG_USBTRDTIM_SHIFT;
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}
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+
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dwc2_writel(hsotg, usbcfg, GUSBCFG);
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dwc2_hsotg_init_fifo(hsotg);
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diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
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index c01fa8ffc0c8..d10a7f8daec3 100644
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--- a/drivers/usb/dwc2/platform.c
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+++ b/drivers/usb/dwc2/platform.c
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@@ -230,9 +230,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
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reset_control_deassert(hsotg->reset_ecc);
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- /* Set default UTMI width */
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- hsotg->phyif = GUSBCFG_PHYIF16;
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-
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/*
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* Attempt to find a generic PHY, then look for an old style
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* USB PHY and then fall back to pdata
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@@ -280,7 +277,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
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* width is 8-bit and set the phyif appropriately.
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*/
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if (phy_get_bus_width(hsotg->phy) == 8)
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- hsotg->phyif = GUSBCFG_PHYIF8;
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+ hsotg->params.phy_utmi_width = 8;
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}
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/* Clock */
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--
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2.11.0
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