1cd8ae19a9
Add backported patched from 5.x from usb related fixes Up kernel version to most recent lts
36 lines
1.2 KiB
Diff
36 lines
1.2 KiB
Diff
From 1112cf4c4109473fd8a30a4678d25f9321ef5d67 Mon Sep 17 00:00:00 2001
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From: Marek Szyprowski <m.szyprowski@samsung.com>
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Date: Fri, 14 Jun 2019 08:52:53 +0200
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Subject: [PATCH 50/53] usb: dwc2: Force 8bit UTMI width for Samsung Exynos
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SoCs
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Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
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host side of the shared USB2 PHY doesn't work.
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Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
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Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
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Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
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Acked-by: Minas Harutyunyan <hminas@synopsys.com>
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Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
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Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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drivers/usb/dwc2/params.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
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index 6900eea57526..9ece4affb9d4 100644
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--- a/drivers/usb/dwc2/params.c
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+++ b/drivers/usb/dwc2/params.c
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@@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
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struct dwc2_core_params *p = &hsotg->params;
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p->power_down = 0;
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+ p->phy_utmi_width = 8;
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}
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static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
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--
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2.11.0
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