01368ff288
fixes issue #26
37 lines
1.3 KiB
Diff
37 lines
1.3 KiB
Diff
From: Douglas Anderson <dianders@chromium.org>
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Date: Tue, 07 May 2019 13:49:58 -0700 (PDT)
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When calculating the MMC phase we can just use clk_hw_get_rate()
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instead of clk_get_rate(). This avoids recalculating the rate.
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Suggested-by: Stephen Boyd <sboyd@kernel.org>
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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---
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drivers/clk/rockchip/clk-mmc-phase.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c
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index 026a26bb702d..07526f64dbfd 100644
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--- a/drivers/clk/rockchip/clk-mmc-phase.c
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+++ b/drivers/clk/rockchip/clk-mmc-phase.c
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@@ -55,7 +55,7 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw,
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static int rockchip_mmc_get_phase(struct clk_hw *hw)
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{
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struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw);
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- unsigned long rate = clk_get_rate(hw->clk);
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+ unsigned long rate = clk_hw_get_rate(hw);
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u32 raw_value;
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u16 degrees;
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u32 delay_num = 0;
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@@ -86,7 +86,7 @@ static int rockchip_mmc_get_phase(struct clk_hw *hw)
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static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees)
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{
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struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw);
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- unsigned long rate = clk_get_rate(hw->clk);
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+ unsigned long rate = clk_hw_get_rate(hw);
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u8 nineties, remainder;
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u8 delay_num;
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u32 raw_value;
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