86 lines
3.1 KiB
Diff
86 lines
3.1 KiB
Diff
[2/2] ARM: errata: add support for A12/A17 errata CR711784
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This adds a code for turning on chicken bit 11, which appears to avoid
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a potential CPU deadlock that could occur. The exact set of
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instruction needed to trigger this errata is not totaly known but we
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have a high level of confidence that the problem is fixed by setting
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chicken bit 11.
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All details are in http://crbug.com/711784
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This erratum has no known number and thus I have tagged it CR711784
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(after the Chrome OS bug number). I have created separate A12 / A17
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configs to match how the rest of the A12 / A17 errata is handled.
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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---
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arch/arm/Kconfig | 18 ++++++++++++++++++
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arch/arm/mm/proc-v7.S | 10 ++++++++++
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2 files changed, 28 insertions(+)
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diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
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index 4376fe74f95e..34ec9039206b 100644
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -1181,6 +1181,13 @@ config ARM_ERRATA_857271
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hang. The workaround is expected to have a negligible performance
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impact.
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+config ARM_ERRATA_CR711784_A12
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+ bool "ARM errata: A12: conditional instructions can lead to a CPU hang"
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+ depends on CPU_V7
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+ help
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+ This option enables the workaround for a Cortex-A12 erratum without a
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+ number. The problems are best described in https://crbug.com/711784
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+
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config ARM_ERRATA_852421
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bool "ARM errata: A17: DMB ST might fail to create order between stores"
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depends on CPU_V7
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@@ -1212,6 +1219,17 @@ config ARM_ERRATA_857272
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config option from the A12 erratum due to the way errata are checked
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for and handled.
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+config ARM_ERRATA_CR711784_A17
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+ bool "ARM errata: A17: conditional instructions can lead to a CPU hang"
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+ depends on CPU_V7
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+ help
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+ This option enables the workaround for a Cortex-A17 erratum without a
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+ number. The problems are best described in https://crbug.com/711784
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+ This erratum is not known to be fixed in any A17 revision.
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+ This is identical to Cortex-A12 erratum CR711784. It is a separate
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+ config option from the A12 erratum due to the way errata are checked
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+ for and handled.
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+
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endmenu
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source "arch/arm/common/Kconfig"
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diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
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index cd2accbab844..a5156ea734ee 100644
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--- a/arch/arm/mm/proc-v7.S
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+++ b/arch/arm/mm/proc-v7.S
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@@ -396,6 +396,11 @@ __ca12_errata:
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mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register
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orr r10, r10, #1 << 10 @ set bit #10
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mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register
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+#endif
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+#ifdef CONFIG_ARM_ERRATA_CR711784_A12
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+ mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register
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+ orr r10, r10, #1 << 11 @ set bit #11
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+ mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register
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#endif
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b __errata_finish
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@@ -416,6 +421,11 @@ __ca17_errata:
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mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register
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orr r10, r10, #1 << 10 @ set bit #10
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mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register
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+#endif
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+#ifdef CONFIG_ARM_ERRATA_CR711784_A17
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+ mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register
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+ orr r10, r10, #1 << 11 @ set bit #11
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+ mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register
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#endif
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b __errata_finish
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