cad1891021
Added three patches to fix the mmc issue as described here: https://github.com/SolidHal/Librean/issues/17 Source for the patches is the chrome os kernel. Links to the commits can be found in the issue. Locking into version 4.17.2 for the time being. Better organized patches. Added logic to only apply tested patches on fresh kernel. Moved some debian build improvements in from my devsus master branch, including switching from xfce to lxqt. May be able to add option between the two in the future, as the issue that led to switching DEs may have been with the xorg video drivers that are now skipped by the script and not xfce itself. Cleaned up uneeded old configs
57 lines
1.7 KiB
Diff
57 lines
1.7 KiB
Diff
From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
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From: Myy Miouyouyou <myy@miouyouyou.fr>
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Date: Thu, 19 Oct 2017 21:39:00 +0200
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Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
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sizes of MMC nodes
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Imported from the Rockchip 4.4 patches.
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Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
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---
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arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index be985f02..14ef8202 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -236,6 +236,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0x0 0xff0c0000 0x0 0x4000>;
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resets = <&cru SRST_MMC0>;
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reset-names = "reset";
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@@ -250,6 +252,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0x0 0xff0d0000 0x0 0x4000>;
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resets = <&cru SRST_SDIO0>;
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reset-names = "reset";
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@@ -264,6 +268,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0x0 0xff0e0000 0x0 0x4000>;
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resets = <&cru SRST_SDIO1>;
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reset-names = "reset";
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@@ -278,6 +284,8 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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reg = <0x0 0xff0f0000 0x0 0x4000>;
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resets = <&cru SRST_EMMC>;
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reset-names = "reset";
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--
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2.11.0
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