U-Boot patches without compilation errors. Linking error 'undefined printf' to fix
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@ -1,21 +1,8 @@
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Index: u-boot-imx/arch/arm/dts/Makefile
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===================================================================
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--- u-boot-imx.orig/arch/arm/dts/Makefile
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+++ u-boot-imx/arch/arm/dts/Makefile
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@@ -630,6 +630,7 @@
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fsl-imx8mq-ddr3l-arm2.dtb \
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fsl-imx8mq-ddr4-arm2.dtb \
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fsl-imx8mm-evk.dtb \
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+ fsl-imx8mm-tgr.dtb \
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fsl-imx8mm-ddr3l-val.dtb \
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fsl-imx8mm-ddr4-evk.dtb \
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fsl-imx8mm-ddr4-val.dtb \
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fsl-imx8mm-ddr4-evk.dtb \
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Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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===================================================================
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===================================================================
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--- /dev/null
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--- /dev/null
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+++ u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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+++ u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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@@ -0,0 +1,466 @@
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@@ -0,0 +1,439 @@
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+/*
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+/*
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+ * Copyright 2018 NXP
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+ * Copyright 2018 NXP
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+ *
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+ *
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@ -88,18 +75,6 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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+ >;
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+ >;
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+ };
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+ };
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+
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+
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+ pinctrl_flexspi0: flexspi0grp {
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+ fsl,pins = <
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+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4
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+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84
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+
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+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84
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+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84
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+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84
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+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84
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+ >;
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+ };
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+
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+ pinctrl_i2c1: i2c1grp {
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+ pinctrl_i2c1: i2c1grp {
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+ fsl,pins = <
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+ fsl,pins = <
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+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
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+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
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@ -403,21 +378,6 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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+ status = "okay";
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+ status = "okay";
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+};
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+};
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+
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+
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+&flexspi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_flexspi0>;
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+ status = "okay";
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+
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+ flash0: n25q256a@0 {
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spi-flash";
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+ spi-max-frequency = <29000000>;
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+ spi-nor,ddr-quad-read-dummy = <8>;
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+ };
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+};
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+
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+&fec1 {
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+&fec1 {
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+ pinctrl-names = "default";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_fec1>;
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+ pinctrl-0 = <&pinctrl_fec1>;
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@ -558,7 +518,7 @@ Index: u-boot-imx/board/tiesse/tgr/ddr4_timing.c
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+#include <linux/kernel.h>
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+#include <linux/kernel.h>
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+#include <common.h>
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+#include <common.h>
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+#include <asm/arch/ddr.h>
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+#include <asm/arch/ddr.h>
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+#include <asm/arch/imx8m_ddr.h>
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+#include <asm/arch-imx8m/ddr.h>
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+
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+
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+struct dram_cfg_param ddr4_ddrc_cfg[] = {
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+struct dram_cfg_param ddr4_ddrc_cfg[] = {
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+ /* Start to config, default 2400mbps */
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+ /* Start to config, default 2400mbps */
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@ -2045,7 +2005,7 @@ Index: u-boot-imx/board/tiesse/tgr/lpddr4_timing.c
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+ */
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+ */
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+
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+
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+#include <linux/kernel.h>
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+#include <linux/kernel.h>
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+#include <asm/arch/imx8m_ddr.h>
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+#include <asm/arch-imx8m/ddr.h>
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+
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+
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+struct dram_cfg_param ddr_ddrc_cfg[] = {
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+struct dram_cfg_param ddr_ddrc_cfg[] = {
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+ /* Initialize DDRC registers */
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+ /* Initialize DDRC registers */
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@ -3917,7 +3877,7 @@ Index: u-boot-imx/board/tiesse/tgr/spl.c
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+#include <asm/mach-imx/mxc_i2c.h>
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+#include <asm/mach-imx/mxc_i2c.h>
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+#include <fsl_esdhc.h>
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+#include <fsl_esdhc.h>
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+#include <mmc.h>
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+#include <mmc.h>
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+#include <asm/arch/imx8m_ddr.h>
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+#include <asm/arch-imx8m/ddr.h>
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+
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+
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@ -4891,7 +4851,7 @@ Index: u-boot-imx/configs/imx8mm_tgr_defconfig
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+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-tgr"
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+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-tgr"
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+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-tgr.dtb"
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+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-tgr.dtb"
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_CMD_SF=y
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+#CONFIG_CMD_SF=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_CACHE=y
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+CONFIG_CMD_CACHE=y
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@ -0,0 +1,12 @@
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Index: u-boot-imx/arch/arm/dts/Makefile
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===================================================================
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--- u-boot-imx.orig/arch/arm/dts/Makefile
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+++ u-boot-imx/arch/arm/dts/Makefile
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@@ -630,6 +630,7 @@
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fsl-imx8mq-ddr3l-arm2.dtb \
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fsl-imx8mq-ddr4-arm2.dtb \
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fsl-imx8mm-evk.dtb \
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+ fsl-imx8mm-tgr.dtb \
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fsl-imx8mm-ddr3l-val.dtb \
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fsl-imx8mm-ddr4-evk.dtb \
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fsl-imx8mm-ddr4-val.dtb \
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