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U-Boot patches without compilation errors. Linking error 'undefined printf' to fix

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This commit is contained in:
Giulio 2020-09-09 20:55:49 +02:00
parent 3ddcefb55e
commit 05c92a9540
2 changed files with 5170 additions and 5198 deletions
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50
buildroot/board/tiesse/tgr/uboot-patches/0000-Add-imx8mm-tgr-support.patch
View File

@ -1,21 +1,8 @@
Index: u-boot-imx/arch/arm/dts/Makefile
===================================================================
--- u-boot-imx.orig/arch/arm/dts/Makefile
+++ u-boot-imx/arch/arm/dts/Makefile
@@ -630,6 +630,7 @@
fsl-imx8mq-ddr3l-arm2.dtb \
fsl-imx8mq-ddr4-arm2.dtb \
fsl-imx8mm-evk.dtb \
+ fsl-imx8mm-tgr.dtb \
fsl-imx8mm-ddr3l-val.dtb \
fsl-imx8mm-ddr4-evk.dtb \
fsl-imx8mm-ddr4-val.dtb \
fsl-imx8mm-ddr4-evk.dtb \
Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
===================================================================
--- /dev/null
+++ u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
@@ -0,0 +1,466 @@
@@ -0,0 +1,439 @@
+/*
+ * Copyright 2018 NXP
+ *
@ -88,18 +75,6 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
+ >;
+ };
+
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4
+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84
+
+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84
+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84
+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84
+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
@ -403,21 +378,6 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
+ status = "okay";
+};
+
+&flexspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ status = "okay";
+
+ flash0: n25q256a@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <29000000>;
+ spi-nor,ddr-quad-read-dummy = <8>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
@ -558,7 +518,7 @@ Index: u-boot-imx/board/tiesse/tgr/ddr4_timing.c
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/imx8m_ddr.h>
+#include <asm/arch-imx8m/ddr.h>
+
+struct dram_cfg_param ddr4_ddrc_cfg[] = {
+ /* Start to config, default 2400mbps */
@ -2045,7 +2005,7 @@ Index: u-boot-imx/board/tiesse/tgr/lpddr4_timing.c
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/imx8m_ddr.h>
+#include <asm/arch-imx8m/ddr.h>
+
+struct dram_cfg_param ddr_ddrc_cfg[] = {
+ /* Initialize DDRC registers */
@ -3917,7 +3877,7 @@ Index: u-boot-imx/board/tiesse/tgr/spl.c
+#include <asm/mach-imx/mxc_i2c.h>
+#include <fsl_esdhc.h>
+#include <mmc.h>
+#include <asm/arch/imx8m_ddr.h>
+#include <asm/arch-imx8m/ddr.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
@ -4891,7 +4851,7 @@ Index: u-boot-imx/configs/imx8mm_tgr_defconfig
+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-tgr"
+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-tgr.dtb"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_CMD_SF=y
+#CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_CACHE=y

12
buildroot/board/tiesse/tgr/uboot-patches/0002-Add-dts-to-makefile.patch Normal file
View File

@ -0,0 +1,12 @@
Index: u-boot-imx/arch/arm/dts/Makefile
===================================================================
--- u-boot-imx.orig/arch/arm/dts/Makefile
+++ u-boot-imx/arch/arm/dts/Makefile
@@ -630,6 +630,7 @@
fsl-imx8mq-ddr3l-arm2.dtb \
fsl-imx8mq-ddr4-arm2.dtb \
fsl-imx8mm-evk.dtb \
+ fsl-imx8mm-tgr.dtb \
fsl-imx8mm-ddr3l-val.dtb \
fsl-imx8mm-ddr4-evk.dtb \
fsl-imx8mm-ddr4-val.dtb \