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@ -2,16 +2,16 @@ diff --git arch/arm64/boot/dts/freescale/Makefile arch/arm64/boot/dts/freescale/
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index da7ede2f5744..2a0a0f56b9a8 100644
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--- linux-imx/arch/arm64/boot/dts/freescale/Makefile
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+++ linux-imx/arch/arm64/boot/dts/freescale/Makefile
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@@ -118,7 +118,8 @@
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@@ -116,7 +116,8 @@ dtb-$(CONFIG_ARCH_FSL_IMX8MQ) += fsl-imx8mq-ddr3l-arm2.dtb \
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fsl-imx8mq-evk-inmate.dtb \
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fsl-imx8mq-evk-dp.dtb \
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fsl-imx8mq-evk-edp.dtb
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-dtb-$(CONFIG_ARCH_FSL_IMX8MM) += fsl-imx8mm-evk.dtb \
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+dtb-$(CONFIG_ARCH_FSL_IMX8MM) += fsl-imx8mm-tgr.dtb \
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+ fsl-imx8mm-evk.dtb \
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fsl-imx8mm-evk-drm.dtb \
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fsl-imx8mm-evk-ak4497.dtb \
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fsl-imx8mm-evk-m4.dtb \
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fsl-imx8mm-evk-ak5558.dtb \
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diff --git arch/arm64/boot/dts/freescale/fsl-imx8mm-tgr.dts arch/arm64/boot/dts/freescale/fsl-imx8mm-tgr.dts
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new file mode 100755
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index 000000000000..411de1c8c620
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@ -21,14 +21,11 @@ diff --git drivers/mfd/Makefile drivers/mfd/Makefile
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index c6755df735ba..962dcc88d99c 100644
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--- linux-imx/drivers/mfd/Makefile
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+++ linux-imx/drivers/mfd/Makefile
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@@ -241,6 +241,7 @@
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obj-$(CONFIG_MFD_STM32_LPTIMER) += stm32-lptimer.o
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@@ -232,3 +232,4 @@ obj-$(CONFIG_MFD_STM32_LPTIMER) += stm32-lptimer.o
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obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
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obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
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obj-$(CONFIG_MFD_BD71837) += bd71837.o
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+obj-$(CONFIG_MFD_PCA9450) += pca9450.o
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obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
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obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
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obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
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diff --git drivers/mfd/pca9450.c drivers/mfd/pca9450.c
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new file mode 100644
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index 000000000000..85ce6e3eef68
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@ -359,14 +356,14 @@ diff --git drivers/regulator/Makefile drivers/regulator/Makefile
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index 1bddbefbc8e7..0072ad5666f8 100644
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--- linux-imx/drivers/regulator/Makefile
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+++ linux-imx/drivers/regulator/Makefile
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@@ -131,6 +131,7 @@
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obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o
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@@ -126,6 +126,7 @@ obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o
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obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
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obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o
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obj-$(CONFIG_REGULATOR_BD71837) += bd71837-regulator.o
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+obj-$(CONFIG_REGULATOR_PCA9450) += pca9450-regulator.o
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obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
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ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
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diff --git drivers/regulator/pca9450-regulator.c drivers/regulator/pca9450-regulator.c
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new file mode 100644
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index 000000000000..6b9ce8f34e0e
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53
buildroot/board/tiesse/tgr/uboot-patches/0000-Add-imx8mm-tgr-support.patch
Normal file → Executable file
53
buildroot/board/tiesse/tgr/uboot-patches/0000-Add-imx8mm-tgr-support.patch
Normal file → Executable file
@ -1,8 +1,22 @@
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Index: u-boot-imx/arch/arm/dts/Makefile
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===================================================================
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--- u-boot-imx.orig/arch/arm/dts/Makefile
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+++ u-boot-imx/arch/arm/dts/Makefile
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@@ -468,7 +468,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-e
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fsl-imx8mm-ddr3l-val.dtb \
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fsl-imx8mm-ddr4-evk.dtb \
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fsl-imx8mm-ddr4-val.dtb \
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- fsl-imx8mm-evk.dtb
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+ fsl-imx8mm-evk.dtb \
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+ fsl-imx8mm-tgr.dtb
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dtb-$(CONFIG_ARCH_IMX8) += fsl-imx8dx-17x17-val.dtb \
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fsl-imx8qm-ddr4-arm2.dtb \
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Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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===================================================================
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--- /dev/null
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+++ u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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@@ -0,0 +1,439 @@
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@@ -0,0 +1,466 @@
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+/*
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+ * Copyright 2018 NXP
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+ *
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@ -75,6 +89,18 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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+ >;
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+ };
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+
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+ pinctrl_flexspi0: flexspi0grp {
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+ fsl,pins = <
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+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4
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+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84
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+
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+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84
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+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84
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+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84
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+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84
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+ >;
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+ };
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+
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+ pinctrl_i2c1: i2c1grp {
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+ fsl,pins = <
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+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
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@ -378,6 +404,21 @@ Index: u-boot-imx/arch/arm/dts/fsl-imx8mm-tgr.dts
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+ status = "okay";
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+};
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+
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+&flexspi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_flexspi0>;
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+ status = "okay";
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+
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+ flash0: n25q256a@0 {
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spi-flash";
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+ spi-max-frequency = <29000000>;
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+ spi-nor,ddr-quad-read-dummy = <8>;
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+ };
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+};
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+
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+&fec1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_fec1>;
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@ -518,7 +559,7 @@ Index: u-boot-imx/board/tiesse/tgr/ddr4_timing.c
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+#include <linux/kernel.h>
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+#include <common.h>
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+#include <asm/arch/ddr.h>
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+#include <asm/arch-imx8m/ddr.h>
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+#include <asm/arch/imx8m_ddr.h>
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+
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+struct dram_cfg_param ddr4_ddrc_cfg[] = {
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+ /* Start to config, default 2400mbps */
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@ -2005,7 +2046,7 @@ Index: u-boot-imx/board/tiesse/tgr/lpddr4_timing.c
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+ */
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+
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+#include <linux/kernel.h>
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+#include <asm/arch-imx8m/ddr.h>
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+#include <asm/arch/imx8m_ddr.h>
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+
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+struct dram_cfg_param ddr_ddrc_cfg[] = {
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+ /* Initialize DDRC registers */
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@ -3877,7 +3918,7 @@ Index: u-boot-imx/board/tiesse/tgr/spl.c
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+#include <asm/mach-imx/mxc_i2c.h>
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+#include <fsl_esdhc.h>
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+#include <mmc.h>
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+#include <asm/arch-imx8m/ddr.h>
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+#include <asm/arch/imx8m_ddr.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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@ -4849,9 +4890,9 @@ Index: u-boot-imx/configs/imx8mm_tgr_defconfig
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+CONFIG_CMD_EXT4_WRITE=y
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+CONFIG_CMD_FAT=y
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+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-tgr"
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+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-tgr.dtb"
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+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-tgr"
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+CONFIG_ENV_IS_IN_MMC=y
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+#CONFIG_CMD_SF=y
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+CONFIG_CMD_SF=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_CACHE=y
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@ -1,11 +0,0 @@
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--- u-boot-imx/arch/arm/mach-imx/spl_sd.cfg
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+++ u-boot-imx/arch/arm/mach-imx/spl_sd.cfg 2020-09-09 14:32:31.752361831 +0200
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@@ -4,7 +4,7 @@
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*/
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#define __ASSEMBLY__
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-#include <config.h>
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+#include "../include/asm/config.h"
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IMAGE_VERSION 2
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BOOT_FROM sd
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@ -1,12 +0,0 @@
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Index: u-boot-imx/arch/arm/dts/Makefile
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===================================================================
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--- u-boot-imx.orig/arch/arm/dts/Makefile
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+++ u-boot-imx/arch/arm/dts/Makefile
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@@ -630,6 +630,7 @@
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fsl-imx8mq-ddr3l-arm2.dtb \
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fsl-imx8mq-ddr4-arm2.dtb \
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fsl-imx8mm-evk.dtb \
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+ fsl-imx8mm-tgr.dtb \
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fsl-imx8mm-ddr3l-val.dtb \
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fsl-imx8mm-ddr4-evk.dtb \
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fsl-imx8mm-ddr4-val.dtb \
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@ -1,15 +1,15 @@
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BR2_aarch64=y
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BR2_ARM_FPU_VFPV3=y
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BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
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BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
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BR2_TARGET_GENERIC_GETTY_PORT="ttymxc1"
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BR2_ROOTFS_POST_IMAGE_SCRIPT="board/freescale/common/imx/imx8-bootloader-prepare.sh board/freescale/common/imx/post-image.sh"
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BR2_ROOTFS_POST_SCRIPT_ARGS="${UBOOT_DIR}/arch/arm/dts/fsl-imx8mm-evk.dtb"
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BR2_LINUX_KERNEL=y
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BR2_LINUX_KERNEL_CUSTOM_GIT=y
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BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://source.codeaurora.org/external/imx/linux-imx"
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BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="rel_imx_4.19.35_1.1.0"
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BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="imx_4.14.98_2.0.0_ga"
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BR2_LINUX_KERNEL_DTS_SUPPORT=y
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BR2_LINUX_KERNEL_INTREE_DTS_NAME="freescale/fsl-imx8mm-tgr.dtb"
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BR2_LINUX_KERNEL_INTREE_DTS_NAME="freescale/fsl-imx8mm-tgr"
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BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
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BR2_LINUX_KERNEL_PATCH="board/tiesse/tgr/kernel-patches/"
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BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
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@ -30,7 +30,7 @@ BR2_TARGET_UBOOT=y
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BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
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BR2_TARGET_UBOOT_CUSTOM_GIT=y
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BR2_TARGET_UBOOT_CUSTOM_REPO_URL="https://source.codeaurora.org/external/imx/uboot-imx"
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BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="rel_imx_4.19.35_1.1.0"
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BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="imx_v2018.03_4.14.98_2.0.0_ga"
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BR2_TARGET_UBOOT_BOARD_DEFCONFIG="imx8mm_tgr"
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BR2_TARGET_UBOOT_NEEDS_DTC=y
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BR2_TARGET_UBOOT_FORMAT_CUSTOM=y
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@ -46,7 +46,6 @@ BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y
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BR2_GLOBAL_PATCH_DIR="board/tiesse/tgr/packages-patches/"
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BR2_RELRO_FULL=y
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BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
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BR2_TARGET_GENERIC_HOSTNAME="cros"
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BR2_TARGET_GENERIC_ISSUE="1337 Linux"
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BR2_TARGET_ENABLE_ROOT_LOGIN=y
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